drivers/gpu/drm/amd/amdgpu/atombios_dp.c

483

DP_SET_POWER, power_state);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

113

status = core_link_read_dpcd(dc->links[i], DP_SET_POWER,

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

92

status = core_link_read_dpcd(dc->links[i], DP_SET_POWER,

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c

1081

status = core_link_read_dpcd(link, DP_SET_POWER,

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c

1099

DP_SET_POWER,

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c

1106

DP_SET_POWER,

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c

108

DP_SET_POWER,

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_phy.c

53

core_link_write_dpcd(link, DP_SET_POWER, &state,

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

916

ret = drm_dp_dpcd_writeb(&dp->aux, DP_SET_POWER, DP_SET_POWER_D0);

drivers/gpu/drm/bridge/analogix/anx7625.c

937

ret = anx7625_aux_trans(ctx, DP_AUX_NATIVE_WRITE, DP_SET_POWER, 1, &data);

drivers/gpu/drm/bridge/analogix/anx7625.c

977

ret |= anx7625_aux_trans(ctx, DP_AUX_NATIVE_WRITE, DP_SET_POWER, 1, &data);

drivers/gpu/drm/display/drm_dp_helper.c

876

err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);

drivers/gpu/drm/display/drm_dp_helper.c

883

err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);

drivers/gpu/drm/display/drm_dp_helper.c

914

err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);

drivers/gpu/drm/display/drm_dp_helper.c

921

err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);

drivers/gpu/drm/gma500/cdv_intel_dp.c

1115

ret = cdv_intel_dp_aux_native_write_1(encoder, DP_SET_POWER,

drivers/gpu/drm/gma500/cdv_intel_dp.c

1126

DP_SET_POWER,

drivers/gpu/drm/i915/display/intel_dp.c

3792

ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, mode);

drivers/gpu/drm/i915/display/intel_dp.c

3806

ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, mode);

drivers/gpu/drm/i915/display/intel_psr.c

3451

drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, DP_SET_POWER_D0);

drivers/gpu/drm/i915/display/intel_psr.c

729

[0] = (DP_AUX_NATIVE_WRITE << 4) | ((DP_SET_POWER >> 16) & 0xf),

drivers/gpu/drm/i915/display/intel_psr.c

730

[1] = (DP_SET_POWER >> 8) & 0xff,

drivers/gpu/drm/i915/display/intel_psr.c

731

[2] = DP_SET_POWER & 0xff,

drivers/gpu/drm/i915/display/intel_psr.c

840

drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, DP_SET_POWER_D0);

drivers/gpu/drm/mediatek/mtk_dp.c

1378

drm_dp_dpcd_writeb(&mtk_dp->aux, DP_SET_POWER, DP_SET_POWER_D0);

drivers/gpu/drm/mediatek/mtk_dp.c

1382

drm_dp_dpcd_writeb(&mtk_dp->aux, DP_SET_POWER, DP_SET_POWER_D3);

drivers/gpu/drm/msm/dp/dp_link.c

61

len = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);

drivers/gpu/drm/msm/dp/dp_link.c

70

len = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);

drivers/gpu/drm/msm/dp/dp_link.c

88

err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);

drivers/gpu/drm/msm/dp/dp_link.c

95

err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);

drivers/gpu/drm/nouveau/nouveau_dp.c

309

ret = drm_dp_dpcd_readb(aux, DP_SET_POWER, &pwr);

drivers/gpu/drm/nouveau/nouveau_dp.c

313

drm_dp_dpcd_writeb(aux, DP_SET_POWER, pwr);

drivers/gpu/drm/nouveau/nouveau_dp.c

423

if (drm_dp_dpcd_readb(aux, DP_SET_POWER, &pwr) == 1) {

drivers/gpu/drm/nouveau/nouveau_dp.c

427

drm_dp_dpcd_writeb(aux, DP_SET_POWER, pwr);

drivers/gpu/drm/radeon/atombios_dp.c

526

DP_SET_POWER, power_state);

drivers/gpu/drm/xlnx/zynqmp_dp.c

1610

ret = drm_dp_dpcd_writeb(&dp->aux, DP_SET_POWER,

drivers/gpu/drm/xlnx/zynqmp_dp.c

1639

drm_dp_dpcd_writeb(&dp->aux, DP_SET_POWER, DP_SET_POWER_D3);