drivers/gpu/drm/display/drm_dp_helper.c

303

if (dp_phy == DP_PHY_DPRX) {

drivers/gpu/drm/display/drm_dp_helper.c

431

[DP_PHY_DPRX] = "DPRX",

drivers/gpu/drm/display/drm_dp_helper.c

836

if (dp_phy == DP_PHY_DPRX)

drivers/gpu/drm/i915/display/g4x_dp.c

665

DP_PHY_DPRX, DP_TRAINING_PATTERN_1);

drivers/gpu/drm/i915/display/intel_dp.c

5300

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp.c

5455

if (drm_dp_dpcd_read_phy_link_status(&intel_dp->aux, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

106

lt_dbg(intel_dp, DP_PHY_DPRX, "LTTPR common capabilities: %*ph\n",

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1112

lt_dbg(intel_dp, DP_PHY_DPRX, "Failed to read sink status\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1144

intel_dp_program_link_training_pattern(intel_dp, crtc_state, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1152

lt_dbg(intel_dp, DP_PHY_DPRX, "128b/132b intra-hop not clearing\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1315

lt_dbg(intel_dp, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1326

lt_dbg(intel_dp, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1331

lt_dbg(intel_dp, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1349

lt_dbg(intel_dp, DP_PHY_DPRX, "Link Training failed on disconnected sink.\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1354

lt_dbg(intel_dp, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1387

ret = intel_dp_link_train_phy(intel_dp, crtc_state, DP_PHY_DPRX);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1389

intel_dp_disable_dpcd_training_pattern(intel_dp, DP_PHY_DPRX);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1414

if (!intel_dp_reset_link_train(intel_dp, crtc_state, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1416

lt_err(intel_dp, DP_PHY_DPRX, "Failed to start 128b/132b TPS1\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1424

lt_err(intel_dp, DP_PHY_DPRX, "Failed to read TX FFE presets\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1429

intel_dp_get_adjust_train(intel_dp, crtc_state, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1430

if (!intel_dp_update_link_train(intel_dp, crtc_state, DP_PHY_DPRX)) {

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1431

lt_err(intel_dp, DP_PHY_DPRX, "Failed to set initial TX FFE settings\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1436

if (!intel_dp_set_link_train(intel_dp, crtc_state, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1438

lt_err(intel_dp, DP_PHY_DPRX, "Failed to start 128b/132b TPS2\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1449

lt_err(intel_dp, DP_PHY_DPRX, "Failed to read link status\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1454

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1455

lt_err(intel_dp, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1461

lt_dbg(intel_dp, DP_PHY_DPRX, "Lane channel eq done\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1466

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1467

lt_err(intel_dp, DP_PHY_DPRX, "Lane channel eq timeout\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1480

intel_dp_get_adjust_train(intel_dp, crtc_state, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1483

if (!intel_dp_update_link_train(intel_dp, crtc_state, DP_PHY_DPRX)) {

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1484

lt_err(intel_dp, DP_PHY_DPRX, "Failed to update TX FFE settings\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1490

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1491

lt_err(intel_dp, DP_PHY_DPRX, "Max loop count reached\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1500

lt_err(intel_dp, DP_PHY_DPRX, "Failed to read link status\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1505

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1506

lt_err(intel_dp, DP_PHY_DPRX, "Downstream link training failure\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1511

lt_dbg(intel_dp, DP_PHY_DPRX, "Interlane align done\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1516

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1517

lt_err(intel_dp, DP_PHY_DPRX, "Interlane align timeout\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1540

lt_err(intel_dp, DP_PHY_DPRX, "Failed to start 128b/132b TPS2 CDS\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1556

lt_err(intel_dp, DP_PHY_DPRX, "Failed to read link status\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1563

lt_dbg(intel_dp, DP_PHY_DPRX, "CDS interlane align done\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1568

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1569

lt_err(intel_dp, DP_PHY_DPRX, "Downstream link training failure\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1574

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1575

lt_err(intel_dp, DP_PHY_DPRX, "CDS timeout\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1598

lt_err(intel_dp, DP_PHY_DPRX, "128b/132b intra-hop not clear\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1606

lt_dbg(intel_dp, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1622

DP_PHY_DPRX, DP_TRAINING_PATTERN_2);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1624

intel_dp_disable_dpcd_training_pattern(intel_dp, DP_PHY_DPRX);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1672

lt_dbg(intel_dp, DP_PHY_DPRX, "Forcing link training failure\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1693

lt_dbg(intel_dp, DP_PHY_DPRX, "Ignore the link failure\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1706

lt_err(intel_dp, DP_PHY_DPRX, "Can't reduce link training parameters after failure\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1708

lt_dbg(intel_dp, DP_PHY_DPRX, "Can't reduce link training parameters after forced failure\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1728

lt_dbg(intel_dp, DP_PHY_DPRX, "DP2.0 SDP CRC16 for 128b/132b enabled\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

180

lt_dbg(intel_dp, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

330

lttpr_count <= 0 && dp_phy != DP_PHY_DPRX);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

524

return dp_phy == DP_PHY_DPRX ?

drivers/gpu/drm/i915/display/intel_dp_link_training.c

647

int reg = dp_phy == DP_PHY_DPRX ?

drivers/gpu/drm/i915/display/intel_dp_link_training.c

794

sink_tps4 = dp_phy != DP_PHY_DPRX ||

drivers/gpu/drm/i915/display/intel_dp_link_training.c

812

sink_tps3 = dp_phy != DP_PHY_DPRX ||

drivers/gpu/drm/i915/display/intel_dp_link_training.c

866

lt_dbg(intel_dp, DP_PHY_DPRX, "Reloading eDP link rates\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

873

lt_dbg(intel_dp, DP_PHY_DPRX, "Using LINK_BW_SET value %02x\n",

drivers/gpu/drm/i915/display/intel_dp_link_training.c

876

lt_dbg(intel_dp, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_test.c

314

if (drm_dp_dpcd_read_phy_link_status(&intel_dp->aux, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_test.c

321

intel_dp_get_adjust_train(intel_dp, crtc_state, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_test.c

324

intel_dp_set_signal_levels(intel_dp, crtc_state, DP_PHY_DPRX);

drivers/gpu/drm/msm/dp/dp_ctrl.c

1362

if (dp_phy == DP_PHY_DPRX)

drivers/gpu/drm/msm/dp/dp_ctrl.c

1388

if (dp_phy == DP_PHY_DPRX)

drivers/gpu/drm/msm/dp/dp_ctrl.c

1666

ret = msm_dp_ctrl_link_train_1_2(ctrl, training_step, DP_PHY_DPRX);

drivers/gpu/drm/msm/dp/dp_ctrl.c

2018

msm_dp_ctrl_clear_training_pattern(ctrl, DP_PHY_DPRX);

drivers/gpu/drm/msm/dp/dp_ctrl.c

2125

msm_dp_ctrl_update_phy_vx_px(ctrl, DP_PHY_DPRX);

drivers/gpu/drm/msm/dp/dp_ctrl.c

2367

msm_dp_ctrl_clear_training_pattern(ctrl, DP_PHY_DPRX);

drivers/gpu/drm/msm/dp/dp_ctrl.c

2391

msm_dp_ctrl_clear_training_pattern(ctrl, DP_PHY_DPRX);

drivers/gpu/drm/msm/dp/dp_ctrl.c

2530

msm_dp_ctrl_clear_training_pattern(ctrl, DP_PHY_DPRX);

drivers/gpu/drm/nouveau/nouveau_dp.c

347

ret = drm_dp_dpcd_read_phy_link_status(aux, DP_PHY_DPRX, stat);

drivers/gpu/drm/nouveau/nouveau_dp.c

364

ret = drm_dp_dpcd_read_phy_link_status(aux, DP_PHY_DPRX, stat);

drivers/gpu/drm/nouveau/nouveau_dp.c

457

if (drm_dp_dpcd_read_phy_link_status(&outp->conn->aux, DP_PHY_DPRX, link_status) < 0)