drivers/gpu/drm/display/drm_dp_helper.c

2686

u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])

drivers/gpu/drm/display/drm_dp_helper.c

2733

u32 drm_dp_dsc_sink_slice_count_mask(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE],

drivers/gpu/drm/display/drm_dp_helper.c

2788

u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE],

drivers/gpu/drm/display/drm_dp_helper.c

2810

u8 drm_dp_dsc_sink_line_buf_depth(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])

drivers/gpu/drm/display/drm_dp_helper.c

2856

int drm_dp_dsc_sink_supported_input_bpcs(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE],

drivers/gpu/drm/display/drm_dp_helper.c

2914

int drm_dp_dsc_sink_max_slice_throughput(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE],

drivers/gpu/drm/i915/display/intel_display_types.h

557

u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE];

drivers/gpu/drm/i915/display/intel_dp.c

1872

static int intel_dp_sink_dsc_version_minor(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])

drivers/gpu/drm/i915/display/intel_dp.c

4297

u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])

drivers/gpu/drm/i915/display/intel_dp.c

4300

DP_DSC_RECEIVER_CAP_SIZE) < 0) {

drivers/gpu/drm/i915/display/intel_dp.c

4308

DP_DSC_RECEIVER_CAP_SIZE,

include/drm/display/drm_dp_helper.h

208

u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]);

include/drm/display/drm_dp_helper.h

210

u32 drm_dp_dsc_sink_slice_count_mask(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE],

include/drm/display/drm_dp_helper.h

212

u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE],

include/drm/display/drm_dp_helper.h

214

u8 drm_dp_dsc_sink_line_buf_depth(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]);

include/drm/display/drm_dp_helper.h

215

int drm_dp_dsc_sink_supported_input_bpcs(const u8 dsc_dpc[DP_DSC_RECEIVER_CAP_SIZE],

include/drm/display/drm_dp_helper.h

217

int drm_dp_dsc_sink_max_slice_throughput(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE],

include/drm/display/drm_dp_helper.h

224

drm_dp_sink_supports_dsc(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])

include/drm/display/drm_dp_helper.h

231

drm_edp_dsc_sink_output_bpp(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])

include/drm/display/drm_dp_helper.h

239

drm_dp_dsc_sink_max_slice_width(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])

include/drm/display/drm_dp_helper.h

254

drm_dp_dsc_sink_supports_format(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], u8 output_format)