DPLL_SYNCLOCK_ENABLE
if ((temp & DPLL_SYNCLOCK_ENABLE) == 0) {
REG_WRITE(DPLL_A, temp | DPLL_SYNCLOCK_ENABLE);
if ((temp & DPLL_SYNCLOCK_ENABLE) == 0) {
REG_WRITE(DPLL_B, temp | DPLL_SYNCLOCK_ENABLE);
REG_WRITE(dpll_reg, DPLL_SYNCLOCK_ENABLE | DPLL_VGA_MODE_DIS);
dpll |= DPLL_SYNCLOCK_ENABLE;
REG_WRITE(map->dpll, dpll | DPLL_VGA_MODE_DIS | DPLL_SYNCLOCK_ENABLE);