DPU_CLK_CTRL_VIG2
[DPU_CLK_CTRL_VIG2] = { .reg_off = 0x2bc, .bit_off = 0 },
.clk_ctrl = DPU_CLK_CTRL_VIG2,
[DPU_CLK_CTRL_VIG2] = { .reg_off = 0x2bc, .bit_off = 0 },
.clk_ctrl = DPU_CLK_CTRL_VIG2,
[DPU_CLK_CTRL_VIG2] = { .reg_off = 0x2bc, .bit_off = 0 },
.clk_ctrl = DPU_CLK_CTRL_VIG2,
[DPU_CLK_CTRL_VIG2] = { .reg_off = 0x2bc, .bit_off = 0 },
.clk_ctrl = DPU_CLK_CTRL_VIG2,
[DPU_CLK_CTRL_VIG2] = { .reg_off = 0x2bc, .bit_off = 0 },
.clk_ctrl = DPU_CLK_CTRL_VIG2,
[DPU_CLK_CTRL_VIG2] = { .reg_off = 0x2bc, .bit_off = 0 },
.clk_ctrl = DPU_CLK_CTRL_VIG2,
[DPU_CLK_CTRL_VIG2] = { .reg_off = 0x2bc, .bit_off = 0 },
.clk_ctrl = DPU_CLK_CTRL_VIG2,
[DPU_CLK_CTRL_VIG2] = { .reg_off = 0x2bc, .bit_off = 0 },
.clk_ctrl = DPU_CLK_CTRL_VIG2,
[DPU_CLK_CTRL_VIG2] = { .reg_off = 0x2bc, .bit_off = 0 },
.clk_ctrl = DPU_CLK_CTRL_VIG2,
[DPU_CLK_CTRL_VIG2] = { .reg_off = 0x2bc, .bit_off = 0 },
.clk_ctrl = DPU_CLK_CTRL_VIG2,