DPLL_CTRL2
intel_de_rmw(display, DPLL_CTRL2,
intel_de_rmw(display, DPLL_CTRL2,
return !(intel_de_read(display, DPLL_CTRL2) & DPLL_CTRL2_DDI_CLK_OFF(port));
tmp = intel_de_read(display, DPLL_CTRL2);
vgpu_vreg_t(vgpu, DPLL_CTRL2) &=
vgpu_vreg_t(vgpu, DPLL_CTRL2) |=
vgpu_vreg_t(vgpu, DPLL_CTRL2) |=
vgpu_vreg_t(vgpu, DPLL_CTRL2) &=
vgpu_vreg_t(vgpu, DPLL_CTRL2) |=
vgpu_vreg_t(vgpu, DPLL_CTRL2) |=
vgpu_vreg_t(vgpu, DPLL_CTRL2) &=
vgpu_vreg_t(vgpu, DPLL_CTRL2) |=
vgpu_vreg_t(vgpu, DPLL_CTRL2) |=
if (!(vgpu_vreg_t(vgpu, DPLL_CTRL2) & DPLL_CTRL2_DDI_CLK_OFF(port)) &&
(vgpu_vreg_t(vgpu, DPLL_CTRL2) & DPLL_CTRL2_DDI_SEL_OVERRIDE(port))) {
dpll_id += (vgpu_vreg_t(vgpu, DPLL_CTRL2) &
MMIO_D(DPLL_CTRL2);