DP83867_DEVADDR
val_rxcfg = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RXFCFG);
phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFPMD1,
phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFPMD2,
phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFPMD3,
phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFSOP1,
phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFSOP2,
phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFSOP3,
phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RXFCFG, val_rxcfg);
value = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RXFCFG);
sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR,
sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR,
sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR,
phy_set_bits_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4,
phy_clear_bits_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4,
delay = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIIDCTL);
phy_clear_bits_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4,
bs = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_STRAP_STS2);
ret = phy_modify_mmd(phydev, DP83867_DEVADDR,
val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL);
phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL, val);
phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIIDCTL,
val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL);
phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL, val);
phy_modify_mmd(phydev, DP83867_DEVADDR, DP83867_IO_MUX_CFG,
ret = phy_modify_mmd(phydev, DP83867_DEVADDR,
ret = phy_modify_mmd(phydev, DP83867_DEVADDR,
val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_SGMIICTL);
phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_SGMIICTL, val);
phy_set_bits_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4,
phy_modify_mmd(phydev, DP83867_DEVADDR, DP83867_IO_MUX_CFG,
err = phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_DSP_FFE_CFG,