drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

220

if (pp_clks->count > DM_PP_MAX_CLOCK_LEVELS) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

224

DM_PP_MAX_CLOCK_LEVELS);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

226

dc_clks->num_levels = DM_PP_MAX_CLOCK_LEVELS;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

246

if (pp_clks->num_levels > DM_PP_MAX_CLOCK_LEVELS) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

250

DM_PP_MAX_CLOCK_LEVELS);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

252

clk_level_info->num_levels = DM_PP_MAX_CLOCK_LEVELS;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

273

if (pp_clks->num_levels > DM_PP_MAX_CLOCK_LEVELS) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

277

DM_PP_MAX_CLOCK_LEVELS);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

279

clk_level_info->num_levels = DM_PP_MAX_CLOCK_LEVELS;

drivers/gpu/drm/amd/display/dc/dm_services_types.h

109

struct dm_pp_clock_with_latency data[DM_PP_MAX_CLOCK_LEVELS];

drivers/gpu/drm/amd/display/dc/dm_services_types.h

119

struct dm_pp_clock_with_voltage data[DM_PP_MAX_CLOCK_LEVELS];

drivers/gpu/drm/amd/display/dc/dm_services_types.h

99

uint32_t clocks_in_khz[DM_PP_MAX_CLOCK_LEVELS];