arch/sh/drivers/dma/dma-sh.c

37

#define RS_DUAL (DM_INC | SM_INC | RS_AUTO | TS_INDEX2VAL(XMIT_SZ_32BIT))

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

36

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

46

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

56

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

66

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

76

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

86

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

103

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

113

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

123

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

133

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

143

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

153

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

43

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

53

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

63

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

73

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

83

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

93

.chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

131

.chcr = DM_INC | RS_ERS | 0x40000000 |

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

145

.chcr = DM_INC | RS_ERS | 0x40000000 |

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

162

.chcr = DM_INC | RS_ERS | 0x40000000 |

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

176

.chcr = DM_INC | RS_ERS | 0x40000000 |

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

190

.chcr = DM_INC | RS_ERS | 0x40000000 |

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

204

.chcr = DM_INC | RS_ERS | 0x40000000 |

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

221

.chcr = DM_INC | RS_ERS | 0x40000000 |

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

235

.chcr = DM_INC | RS_ERS | 0x40000000 |

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

249

.chcr = DM_INC | RS_ERS | 0x40000000 |

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

263

.chcr = DM_INC | RS_ERS | 0x40000000 |

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

277

.chcr = DM_INC | RS_ERS | 0x40000000 |

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

294

.chcr = DM_INC | RS_ERS | 0x40000000 |

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

308

.chcr = DM_INC | RS_ERS | 0x40000000 |

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

322

.chcr = DM_INC | RS_ERS | 0x40000000 |

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

336

.chcr = DM_INC | RS_ERS | 0x40000000 |

arch/sh/kernel/cpu/sh4a/setup-sh7757.c

350

.chcr = DM_INC | RS_ERS | 0x40000000 |

drivers/dma/sh/shdmac.c

238

u32 chcr = DM_INC | SM_INC | RS_AUTO | log2size_to_chcr(sh_chan,