arch/sh/kernel/cpu/sh4a/setup-sh7722.c

31

.chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

41

.chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

51

.chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

61

.chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

71

.chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

81

.chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

108

.chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

118

.chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

128

.chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

138

.chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

148

.chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

38

.chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

48

.chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

58

.chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

68

.chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

78

.chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

88

.chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

98

.chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),