drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

122

DMUB_SF(DMCUB_CNTL, DMCUB_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

123

DMUB_SF(DMCUB_CNTL, DMCUB_SOFT_RESET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

124

DMUB_SF(DMCUB_CNTL, DMCUB_TRACEPORT_EN) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

125

DMUB_SF(DMCUB_MEM_CNTL, DMCUB_MEM_READ_SPACE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

126

DMUB_SF(DMCUB_MEM_CNTL, DMCUB_MEM_WRITE_SPACE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

127

DMUB_SF(DMCUB_SEC_CNTL, DMCUB_SEC_RESET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

128

DMUB_SF(DMCUB_SEC_CNTL, DMCUB_MEM_UNIT_ID) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

129

DMUB_SF(DMCUB_SEC_CNTL, DMCUB_SEC_RESET_STATUS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

130

DMUB_SF(DMCUB_REGION3_CW0_TOP_ADDRESS, DMCUB_REGION3_CW0_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

131

DMUB_SF(DMCUB_REGION3_CW0_TOP_ADDRESS, DMCUB_REGION3_CW0_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

132

DMUB_SF(DMCUB_REGION3_CW1_TOP_ADDRESS, DMCUB_REGION3_CW1_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

133

DMUB_SF(DMCUB_REGION3_CW1_TOP_ADDRESS, DMCUB_REGION3_CW1_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

134

DMUB_SF(DMCUB_REGION3_CW2_TOP_ADDRESS, DMCUB_REGION3_CW2_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

135

DMUB_SF(DMCUB_REGION3_CW2_TOP_ADDRESS, DMCUB_REGION3_CW2_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

136

DMUB_SF(DMCUB_REGION3_CW3_TOP_ADDRESS, DMCUB_REGION3_CW3_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

137

DMUB_SF(DMCUB_REGION3_CW3_TOP_ADDRESS, DMCUB_REGION3_CW3_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

138

DMUB_SF(DMCUB_REGION3_CW4_TOP_ADDRESS, DMCUB_REGION3_CW4_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

139

DMUB_SF(DMCUB_REGION3_CW4_TOP_ADDRESS, DMCUB_REGION3_CW4_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

140

DMUB_SF(DMCUB_REGION3_CW5_TOP_ADDRESS, DMCUB_REGION3_CW5_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

141

DMUB_SF(DMCUB_REGION3_CW5_TOP_ADDRESS, DMCUB_REGION3_CW5_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

142

DMUB_SF(DMCUB_REGION3_CW6_TOP_ADDRESS, DMCUB_REGION3_CW6_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

143

DMUB_SF(DMCUB_REGION3_CW6_TOP_ADDRESS, DMCUB_REGION3_CW6_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

144

DMUB_SF(DMCUB_REGION3_CW7_TOP_ADDRESS, DMCUB_REGION3_CW7_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

145

DMUB_SF(DMCUB_REGION3_CW7_TOP_ADDRESS, DMCUB_REGION3_CW7_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

146

DMUB_SF(DMCUB_REGION4_TOP_ADDRESS, DMCUB_REGION4_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

147

DMUB_SF(DMCUB_REGION4_TOP_ADDRESS, DMCUB_REGION4_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

148

DMUB_SF(DMCUB_REGION5_TOP_ADDRESS, DMCUB_REGION5_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

149

DMUB_SF(DMCUB_REGION5_TOP_ADDRESS, DMCUB_REGION5_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

150

DMUB_SF(CC_DC_PIPE_DIS, DC_DMCUB_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

151

DMUB_SF(MMHUBBUB_SOFT_RESET, DMUIF_SOFT_RESET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

152

DMUB_SF(DCN_VM_FB_LOCATION_BASE, FB_BASE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

153

DMUB_SF(DCN_VM_FB_OFFSET, FB_OFFSET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

154

DMUB_SF(DMCUB_INTERRUPT_ACK, DMCUB_OUTBOX0_READY_INT_ACK)

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

122

DMUB_SF(DMCUB_CNTL, DMCUB_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

123

DMUB_SF(DMCUB_CNTL, DMCUB_TRACEPORT_EN) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

124

DMUB_SF(DMCUB_CNTL2, DMCUB_SOFT_RESET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

125

DMUB_SF(DMCUB_SEC_CNTL, DMCUB_SEC_RESET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

126

DMUB_SF(DMCUB_SEC_CNTL, DMCUB_MEM_UNIT_ID) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

127

DMUB_SF(DMCUB_SEC_CNTL, DMCUB_SEC_RESET_STATUS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

128

DMUB_SF(DMCUB_REGION3_CW0_TOP_ADDRESS, DMCUB_REGION3_CW0_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

129

DMUB_SF(DMCUB_REGION3_CW0_TOP_ADDRESS, DMCUB_REGION3_CW0_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

130

DMUB_SF(DMCUB_REGION3_CW1_TOP_ADDRESS, DMCUB_REGION3_CW1_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

131

DMUB_SF(DMCUB_REGION3_CW1_TOP_ADDRESS, DMCUB_REGION3_CW1_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

132

DMUB_SF(DMCUB_REGION3_CW2_TOP_ADDRESS, DMCUB_REGION3_CW2_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

133

DMUB_SF(DMCUB_REGION3_CW2_TOP_ADDRESS, DMCUB_REGION3_CW2_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

134

DMUB_SF(DMCUB_REGION3_CW3_TOP_ADDRESS, DMCUB_REGION3_CW3_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

135

DMUB_SF(DMCUB_REGION3_CW3_TOP_ADDRESS, DMCUB_REGION3_CW3_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

136

DMUB_SF(DMCUB_REGION3_CW4_TOP_ADDRESS, DMCUB_REGION3_CW4_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

137

DMUB_SF(DMCUB_REGION3_CW4_TOP_ADDRESS, DMCUB_REGION3_CW4_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

138

DMUB_SF(DMCUB_REGION3_CW5_TOP_ADDRESS, DMCUB_REGION3_CW5_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

139

DMUB_SF(DMCUB_REGION3_CW5_TOP_ADDRESS, DMCUB_REGION3_CW5_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

140

DMUB_SF(DMCUB_REGION3_CW6_TOP_ADDRESS, DMCUB_REGION3_CW6_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

141

DMUB_SF(DMCUB_REGION3_CW6_TOP_ADDRESS, DMCUB_REGION3_CW6_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

142

DMUB_SF(DMCUB_REGION3_CW7_TOP_ADDRESS, DMCUB_REGION3_CW7_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

143

DMUB_SF(DMCUB_REGION3_CW7_TOP_ADDRESS, DMCUB_REGION3_CW7_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

144

DMUB_SF(DMCUB_REGION4_TOP_ADDRESS, DMCUB_REGION4_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

145

DMUB_SF(DMCUB_REGION4_TOP_ADDRESS, DMCUB_REGION4_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

146

DMUB_SF(DMCUB_REGION5_TOP_ADDRESS, DMCUB_REGION5_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

147

DMUB_SF(DMCUB_REGION5_TOP_ADDRESS, DMCUB_REGION5_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

148

DMUB_SF(CC_DC_PIPE_DIS, DC_DMCUB_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

149

DMUB_SF(MMHUBBUB_SOFT_RESET, DMUIF_SOFT_RESET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

150

DMUB_SF(DCN_VM_FB_LOCATION_BASE, FB_BASE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

151

DMUB_SF(DCN_VM_FB_OFFSET, FB_OFFSET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

152

DMUB_SF(DMCUB_INBOX0_WPTR, DMCUB_INBOX0_WPTR) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

153

DMUB_SF(DMCUB_INTERRUPT_ENABLE, DMCUB_GPINT_IH_INT_EN) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

154

DMUB_SF(DMCUB_INTERRUPT_ACK, DMCUB_GPINT_IH_INT_ACK) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.h

155

DMUB_SF(DMCUB_CNTL, DMCUB_PWAIT_MODE_STATUS)

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

32

DMUB_SF(DMCUB_CNTL, DMCUB_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

33

DMUB_SF(DMCUB_CNTL, DMCUB_TRACEPORT_EN) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

34

DMUB_SF(DMCUB_CNTL2, DMCUB_SOFT_RESET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

35

DMUB_SF(DMCUB_SEC_CNTL, DMCUB_SEC_RESET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

36

DMUB_SF(DMCUB_SEC_CNTL, DMCUB_MEM_UNIT_ID) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

37

DMUB_SF(DMCUB_SEC_CNTL, DMCUB_SEC_RESET_STATUS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

38

DMUB_SF(DMCUB_REGION3_CW0_TOP_ADDRESS, DMCUB_REGION3_CW0_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

39

DMUB_SF(DMCUB_REGION3_CW0_TOP_ADDRESS, DMCUB_REGION3_CW0_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

40

DMUB_SF(DMCUB_REGION3_CW1_TOP_ADDRESS, DMCUB_REGION3_CW1_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

41

DMUB_SF(DMCUB_REGION3_CW1_TOP_ADDRESS, DMCUB_REGION3_CW1_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

42

DMUB_SF(DMCUB_REGION3_CW2_TOP_ADDRESS, DMCUB_REGION3_CW2_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

43

DMUB_SF(DMCUB_REGION3_CW2_TOP_ADDRESS, DMCUB_REGION3_CW2_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

44

DMUB_SF(DMCUB_REGION3_CW3_TOP_ADDRESS, DMCUB_REGION3_CW3_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

45

DMUB_SF(DMCUB_REGION3_CW3_TOP_ADDRESS, DMCUB_REGION3_CW3_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

46

DMUB_SF(DMCUB_REGION3_CW4_TOP_ADDRESS, DMCUB_REGION3_CW4_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

47

DMUB_SF(DMCUB_REGION3_CW4_TOP_ADDRESS, DMCUB_REGION3_CW4_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

48

DMUB_SF(DMCUB_REGION3_CW5_TOP_ADDRESS, DMCUB_REGION3_CW5_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

49

DMUB_SF(DMCUB_REGION3_CW5_TOP_ADDRESS, DMCUB_REGION3_CW5_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

50

DMUB_SF(DMCUB_REGION3_CW6_TOP_ADDRESS, DMCUB_REGION3_CW6_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

51

DMUB_SF(DMCUB_REGION3_CW6_TOP_ADDRESS, DMCUB_REGION3_CW6_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

52

DMUB_SF(DMCUB_REGION3_CW7_TOP_ADDRESS, DMCUB_REGION3_CW7_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

53

DMUB_SF(DMCUB_REGION3_CW7_TOP_ADDRESS, DMCUB_REGION3_CW7_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

54

DMUB_SF(DMCUB_REGION4_TOP_ADDRESS, DMCUB_REGION4_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

55

DMUB_SF(DMCUB_REGION4_TOP_ADDRESS, DMCUB_REGION4_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

56

DMUB_SF(DMCUB_REGION5_TOP_ADDRESS, DMCUB_REGION5_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

57

DMUB_SF(DMCUB_REGION5_TOP_ADDRESS, DMCUB_REGION5_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

58

DMUB_SF(CC_DC_PIPE_DIS, DC_DMCUB_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

59

DMUB_SF(MMHUBBUB_SOFT_RESET, DMUIF_SOFT_RESET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

60

DMUB_SF(DCN_VM_FB_LOCATION_BASE, FB_BASE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

61

DMUB_SF(DCN_VM_FB_OFFSET, FB_OFFSET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

62

DMUB_SF(DMCUB_INBOX0_WPTR, DMCUB_INBOX0_WPTR) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

63

DMUB_SF(DMCUB_INTERRUPT_ENABLE, DMCUB_GPINT2_INT_EN) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn315.h

64

DMUB_SF(DMCUB_INTERRUPT_ACK, DMCUB_GPINT2_INT_ACK)

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

135

DMUB_SF(DMCUB_CNTL, DMCUB_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

136

DMUB_SF(DMCUB_CNTL, DMCUB_TRACEPORT_EN) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

137

DMUB_SF(DMCUB_CNTL2, DMCUB_SOFT_RESET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

138

DMUB_SF(DMCUB_SEC_CNTL, DMCUB_SEC_RESET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

139

DMUB_SF(DMCUB_SEC_CNTL, DMCUB_MEM_UNIT_ID) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

140

DMUB_SF(DMCUB_SEC_CNTL, DMCUB_SEC_RESET_STATUS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

141

DMUB_SF(DMCUB_REGION3_CW0_TOP_ADDRESS, DMCUB_REGION3_CW0_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

142

DMUB_SF(DMCUB_REGION3_CW0_TOP_ADDRESS, DMCUB_REGION3_CW0_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

143

DMUB_SF(DMCUB_REGION3_CW1_TOP_ADDRESS, DMCUB_REGION3_CW1_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

144

DMUB_SF(DMCUB_REGION3_CW1_TOP_ADDRESS, DMCUB_REGION3_CW1_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

145

DMUB_SF(DMCUB_REGION3_CW2_TOP_ADDRESS, DMCUB_REGION3_CW2_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

146

DMUB_SF(DMCUB_REGION3_CW2_TOP_ADDRESS, DMCUB_REGION3_CW2_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

147

DMUB_SF(DMCUB_REGION3_CW3_TOP_ADDRESS, DMCUB_REGION3_CW3_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

148

DMUB_SF(DMCUB_REGION3_CW3_TOP_ADDRESS, DMCUB_REGION3_CW3_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

149

DMUB_SF(DMCUB_REGION3_CW4_TOP_ADDRESS, DMCUB_REGION3_CW4_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

150

DMUB_SF(DMCUB_REGION3_CW4_TOP_ADDRESS, DMCUB_REGION3_CW4_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

151

DMUB_SF(DMCUB_REGION3_CW5_TOP_ADDRESS, DMCUB_REGION3_CW5_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

152

DMUB_SF(DMCUB_REGION3_CW5_TOP_ADDRESS, DMCUB_REGION3_CW5_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

153

DMUB_SF(DMCUB_REGION3_CW6_TOP_ADDRESS, DMCUB_REGION3_CW6_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

154

DMUB_SF(DMCUB_REGION3_CW6_TOP_ADDRESS, DMCUB_REGION3_CW6_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

155

DMUB_SF(DMCUB_REGION3_CW7_TOP_ADDRESS, DMCUB_REGION3_CW7_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

156

DMUB_SF(DMCUB_REGION3_CW7_TOP_ADDRESS, DMCUB_REGION3_CW7_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

157

DMUB_SF(DMCUB_REGION4_TOP_ADDRESS, DMCUB_REGION4_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

158

DMUB_SF(DMCUB_REGION4_TOP_ADDRESS, DMCUB_REGION4_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

159

DMUB_SF(DMCUB_REGION5_TOP_ADDRESS, DMCUB_REGION5_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

160

DMUB_SF(DMCUB_REGION5_TOP_ADDRESS, DMCUB_REGION5_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

161

DMUB_SF(DMCUB_REGION6_TOP_ADDRESS, DMCUB_REGION6_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

162

DMUB_SF(DMCUB_REGION6_TOP_ADDRESS, DMCUB_REGION6_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

163

DMUB_SF(CC_DC_PIPE_DIS, DC_DMCUB_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

164

DMUB_SF(MMHUBBUB_SOFT_RESET, DMUIF_SOFT_RESET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

165

DMUB_SF(DCN_VM_FB_LOCATION_BASE, FB_BASE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

166

DMUB_SF(DCN_VM_FB_OFFSET, FB_OFFSET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

167

DMUB_SF(DMCUB_INBOX0_WPTR, DMCUB_INBOX0_WPTR) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

168

DMUB_SF(DMCUB_REGION3_TMR_AXI_SPACE, DMCUB_REGION3_TMR_AXI_SPACE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

169

DMUB_SF(DMCUB_INTERRUPT_ENABLE, DMCUB_GPINT_IH_INT_EN) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

170

DMUB_SF(DMCUB_INTERRUPT_ACK, DMCUB_GPINT_IH_INT_ACK) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

171

DMUB_SF(DMCUB_CNTL, DMCUB_PWAIT_MODE_STATUS)

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

134

DMUB_SF(DMCUB_CNTL, DMCUB_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

135

DMUB_SF(DMCUB_CNTL, DMCUB_TRACEPORT_EN) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

136

DMUB_SF(DMCUB_CNTL2, DMCUB_SOFT_RESET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

137

DMUB_SF(DMCUB_SEC_CNTL, DMCUB_SEC_RESET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

138

DMUB_SF(DMCUB_SEC_CNTL, DMCUB_MEM_UNIT_ID) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

139

DMUB_SF(DMCUB_SEC_CNTL, DMCUB_SEC_RESET_STATUS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

140

DMUB_SF(DMCUB_REGION3_CW0_TOP_ADDRESS, DMCUB_REGION3_CW0_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

141

DMUB_SF(DMCUB_REGION3_CW0_TOP_ADDRESS, DMCUB_REGION3_CW0_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

142

DMUB_SF(DMCUB_REGION3_CW1_TOP_ADDRESS, DMCUB_REGION3_CW1_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

143

DMUB_SF(DMCUB_REGION3_CW1_TOP_ADDRESS, DMCUB_REGION3_CW1_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

144

DMUB_SF(DMCUB_REGION3_CW2_TOP_ADDRESS, DMCUB_REGION3_CW2_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

145

DMUB_SF(DMCUB_REGION3_CW2_TOP_ADDRESS, DMCUB_REGION3_CW2_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

146

DMUB_SF(DMCUB_REGION3_CW3_TOP_ADDRESS, DMCUB_REGION3_CW3_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

147

DMUB_SF(DMCUB_REGION3_CW3_TOP_ADDRESS, DMCUB_REGION3_CW3_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

148

DMUB_SF(DMCUB_REGION3_CW4_TOP_ADDRESS, DMCUB_REGION3_CW4_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

149

DMUB_SF(DMCUB_REGION3_CW4_TOP_ADDRESS, DMCUB_REGION3_CW4_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

150

DMUB_SF(DMCUB_REGION3_CW5_TOP_ADDRESS, DMCUB_REGION3_CW5_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

151

DMUB_SF(DMCUB_REGION3_CW5_TOP_ADDRESS, DMCUB_REGION3_CW5_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

152

DMUB_SF(DMCUB_REGION3_CW6_TOP_ADDRESS, DMCUB_REGION3_CW6_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

153

DMUB_SF(DMCUB_REGION3_CW6_TOP_ADDRESS, DMCUB_REGION3_CW6_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

154

DMUB_SF(DMCUB_REGION3_CW7_TOP_ADDRESS, DMCUB_REGION3_CW7_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

155

DMUB_SF(DMCUB_REGION3_CW7_TOP_ADDRESS, DMCUB_REGION3_CW7_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

156

DMUB_SF(DMCUB_REGION4_TOP_ADDRESS, DMCUB_REGION4_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

157

DMUB_SF(DMCUB_REGION4_TOP_ADDRESS, DMCUB_REGION4_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

158

DMUB_SF(DMCUB_REGION5_TOP_ADDRESS, DMCUB_REGION5_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

159

DMUB_SF(DMCUB_REGION5_TOP_ADDRESS, DMCUB_REGION5_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

160

DMUB_SF(DMCUB_REGION6_TOP_ADDRESS, DMCUB_REGION6_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

161

DMUB_SF(DMCUB_REGION6_TOP_ADDRESS, DMCUB_REGION6_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

162

DMUB_SF(CC_DC_PIPE_DIS, DC_DMCUB_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

163

DMUB_SF(MMHUBBUB_SOFT_RESET, DMUIF_SOFT_RESET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

164

DMUB_SF(DCN_VM_FB_LOCATION_BASE, FB_BASE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

165

DMUB_SF(DCN_VM_FB_OFFSET, FB_OFFSET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

166

DMUB_SF(DMCUB_INBOX0_WPTR, DMCUB_INBOX0_WPTR) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

167

DMUB_SF(DMCUB_REGION3_TMR_AXI_SPACE, DMCUB_REGION3_TMR_AXI_SPACE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

168

DMUB_SF(DMCUB_INTERRUPT_ENABLE, DMCUB_GPINT_IH_INT_EN) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

169

DMUB_SF(DMCUB_INTERRUPT_ACK, DMCUB_GPINT_IH_INT_ACK) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

170

DMUB_SF(DMCUB_CNTL, DMCUB_PWAIT_MODE_STATUS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

171

DMUB_SF(DMU_CLK_CNTL, LONO_DISPCLK_GATE_DISABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

172

DMUB_SF(DMU_CLK_CNTL, LONO_SOCCLK_GATE_DISABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.h

173

DMUB_SF(DMU_CLK_CNTL, LONO_DMCUBCLK_GATE_DISABLE)

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

130

DMUB_SF(DMCUB_CNTL, DMCUB_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

131

DMUB_SF(DMCUB_CNTL, DMCUB_TRACEPORT_EN) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

132

DMUB_SF(DMCUB_CNTL2, DMCUB_SOFT_RESET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

133

DMUB_SF(DMCUB_SEC_CNTL, DMCUB_SEC_RESET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

134

DMUB_SF(DMCUB_SEC_CNTL, DMCUB_MEM_UNIT_ID) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

135

DMUB_SF(DMCUB_SEC_CNTL, DMCUB_SEC_RESET_STATUS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

136

DMUB_SF(DMCUB_REGION3_CW0_TOP_ADDRESS, DMCUB_REGION3_CW0_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

137

DMUB_SF(DMCUB_REGION3_CW0_TOP_ADDRESS, DMCUB_REGION3_CW0_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

138

DMUB_SF(DMCUB_REGION3_CW1_TOP_ADDRESS, DMCUB_REGION3_CW1_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

139

DMUB_SF(DMCUB_REGION3_CW1_TOP_ADDRESS, DMCUB_REGION3_CW1_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

140

DMUB_SF(DMCUB_REGION3_CW2_TOP_ADDRESS, DMCUB_REGION3_CW2_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

141

DMUB_SF(DMCUB_REGION3_CW2_TOP_ADDRESS, DMCUB_REGION3_CW2_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

142

DMUB_SF(DMCUB_REGION3_CW3_TOP_ADDRESS, DMCUB_REGION3_CW3_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

143

DMUB_SF(DMCUB_REGION3_CW3_TOP_ADDRESS, DMCUB_REGION3_CW3_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

144

DMUB_SF(DMCUB_REGION3_CW4_TOP_ADDRESS, DMCUB_REGION3_CW4_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

145

DMUB_SF(DMCUB_REGION3_CW4_TOP_ADDRESS, DMCUB_REGION3_CW4_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

146

DMUB_SF(DMCUB_REGION3_CW5_TOP_ADDRESS, DMCUB_REGION3_CW5_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

147

DMUB_SF(DMCUB_REGION3_CW5_TOP_ADDRESS, DMCUB_REGION3_CW5_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

148

DMUB_SF(DMCUB_REGION3_CW6_TOP_ADDRESS, DMCUB_REGION3_CW6_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

149

DMUB_SF(DMCUB_REGION3_CW6_TOP_ADDRESS, DMCUB_REGION3_CW6_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

150

DMUB_SF(DMCUB_REGION3_CW7_TOP_ADDRESS, DMCUB_REGION3_CW7_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

151

DMUB_SF(DMCUB_REGION3_CW7_TOP_ADDRESS, DMCUB_REGION3_CW7_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

152

DMUB_SF(DMCUB_REGION4_TOP_ADDRESS, DMCUB_REGION4_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

153

DMUB_SF(DMCUB_REGION4_TOP_ADDRESS, DMCUB_REGION4_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

154

DMUB_SF(DMCUB_REGION5_TOP_ADDRESS, DMCUB_REGION5_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

155

DMUB_SF(DMCUB_REGION5_TOP_ADDRESS, DMCUB_REGION5_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

156

DMUB_SF(DMCUB_REGION6_TOP_ADDRESS, DMCUB_REGION6_TOP_ADDRESS) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

157

DMUB_SF(DMCUB_REGION6_TOP_ADDRESS, DMCUB_REGION6_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

158

DMUB_SF(CC_DC_PIPE_DIS, DC_DMCUB_ENABLE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

159

DMUB_SF(MMHUBBUB_SOFT_RESET, DMUIF_SOFT_RESET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

160

DMUB_SF(DCN_VM_FB_LOCATION_BASE, FB_BASE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

161

DMUB_SF(DCN_VM_FB_OFFSET, FB_OFFSET) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

162

DMUB_SF(DMCUB_INBOX0_WPTR, DMCUB_INBOX0_WPTR) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

163

DMUB_SF(DMCUB_REGION3_TMR_AXI_SPACE, DMCUB_REGION3_TMR_AXI_SPACE) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

164

DMUB_SF(DMCUB_INTERRUPT_ENABLE, DMCUB_GPINT_IH_INT_EN) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

165

DMUB_SF(DMCUB_INTERRUPT_ACK, DMCUB_GPINT_IH_INT_ACK) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

166

DMUB_SF(DMCUB_INTERRUPT_STATUS, DMCUB_REG_OUTBOX0_RSP_INT_STAT) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

167

DMUB_SF(HOST_INTERRUPT_CSR, HOST_REG_INBOX0_RSP_INT_ACK) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

168

DMUB_SF(HOST_INTERRUPT_CSR, HOST_REG_INBOX0_RSP_INT_STAT) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

169

DMUB_SF(HOST_INTERRUPT_CSR, HOST_REG_INBOX0_RSP_INT_EN) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

170

DMUB_SF(HOST_INTERRUPT_CSR, HOST_REG_OUTBOX0_RDY_INT_ACK) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

171

DMUB_SF(HOST_INTERRUPT_CSR, HOST_REG_OUTBOX0_RDY_INT_STAT) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

172

DMUB_SF(HOST_INTERRUPT_CSR, HOST_REG_OUTBOX0_RDY_INT_EN) \

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h

173

DMUB_SF(DMCUB_CNTL, DMCUB_PWAIT_MODE_STATUS)