drivers/gpu/drm/radeon/evergreen.c

1102

case DMA_STATUS_REG:

drivers/gpu/drm/radeon/evergreen.c

3794

RREG32(DMA_STATUS_REG));

drivers/gpu/drm/radeon/evergreen.c

3797

RREG32(DMA_STATUS_REG + 0x800));

drivers/gpu/drm/radeon/evergreen.c

3853

tmp = RREG32(DMA_STATUS_REG);

drivers/gpu/drm/radeon/ni.c

1743

tmp = RREG32(DMA_STATUS_REG + DMA0_REGISTER_OFFSET);

drivers/gpu/drm/radeon/ni.c

1748

tmp = RREG32(DMA_STATUS_REG + DMA1_REGISTER_OFFSET);

drivers/gpu/drm/radeon/ni.c

844

case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET):

drivers/gpu/drm/radeon/ni.c

845

case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET):

drivers/gpu/drm/radeon/r600.c

1583

RREG32(DMA_STATUS_REG));

drivers/gpu/drm/radeon/r600.c

1646

tmp = RREG32(DMA_STATUS_REG);

drivers/gpu/drm/radeon/r600.c

181

case DMA_STATUS_REG:

drivers/gpu/drm/radeon/si.c

1297

case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET):

drivers/gpu/drm/radeon/si.c

1298

case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET):

drivers/gpu/drm/radeon/si.c

3782

tmp = RREG32(DMA_STATUS_REG + DMA0_REGISTER_OFFSET);

drivers/gpu/drm/radeon/si.c

3787

tmp = RREG32(DMA_STATUS_REG + DMA1_REGISTER_OFFSET);