DMA_STATUS
[DMA_STATUS] = 0x08,
[DMA_STATUS] = 0x08,
[DMA_STATUS] = 0x04,
reg = bcmgenet_tdma_readl(priv, DMA_STATUS);
reg = bcmgenet_rdma_readl(priv, DMA_STATUS);
#define DMA_CHAN_STATUS(chan) dma_chan_base_addr(DMA_STATUS, chan)
writel((intr_status & 0x1ffff), ioaddr + DMA_STATUS);
STAT_MAC_REG(DMA_STATUS), STAT_MAC_REG(DMA_TRIGGER),
STAT_PTA_REG(DMA_STATUS), STAT_PTA_REG(DMA_MODE_CTRL),