DMA_ALIGNMENT
VPX_DECODER_FRAME_CONCURENCY_LVL) / num_vpp_pipes), DMA_ALIGNMENT);
return ALIGN(size_left + size_top + vpss_top_lb + vpss_left_lb, DMA_ALIGNMENT);
DMA_ALIGNMENT);
u32 dpb_opb = 3 * ((max_tile_height >> 3) * DMA_ALIGNMENT);
return ALIGN(dpb_opb, DMA_ALIGNMENT) * num_luma_chrome_plane;
vp9_top_lb = ALIGN(size_vp9d_lb_vsp_top(frame_width, frame_height), DMA_ALIGNMENT);
vp9_top_lb += ALIGN(size_vpxd_lb_se_top_ctrl(frame_width, frame_height), DMA_ALIGNMENT);
vp9_top_lb = ALIGN(vp9_top_lb, DMA_ALIGNMENT);
vp9_top_lb += ALIGN((DMA_ALIGNMENT * DIV_ROUND_UP(frame_width, lcu_size)),
DMA_ALIGNMENT) * FE_TOP_CTRL_LINE_NUMBERS;
vp9_top_lb += ALIGN(DMA_ALIGNMENT * 8 * DIV_ROUND_UP(frame_width, lcu_size),
DMA_ALIGNMENT) * (FE_TOP_DATA_LUMA_LINE_NUMBERS +
vp9_fe_left_lb = ALIGN((DMA_ALIGNMENT * num_lcu_per_pipe), DMA_ALIGNMENT) *
vp9_fe_left_lb += ((ALIGN((DMA_ALIGNMENT * 8 * num_lcu_per_pipe), DMA_ALIGNMENT) *
ALIGN((DMA_ALIGNMENT * 3 * num_lcu_per_pipe), DMA_ALIGNMENT) +
ALIGN((DMA_ALIGNMENT * 4 * num_lcu_per_pipe), DMA_ALIGNMENT) +
(ALIGN((DMA_ALIGNMENT * 24 * num_lcu_per_pipe), DMA_ALIGNMENT) *
DMA_ALIGNMENT);
vp9d_qp = ALIGN(size_vp9d_qp(frame_width, frame_height), DMA_ALIGNMENT);
NUM_HW_PIC_BUF, DMA_ALIGNMENT);
rpu_enabled * NUM_HW_PIC_BUF * SIZE_DOLBY_RPU_METADATA), DMA_ALIGNMENT);
return ALIGN(VP9_NUM_PROBABILITY_TABLE_BUF * VP9_PROB_TABLE_SIZE, DMA_ALIGNMENT) +
(ALIGN(hfi_iris3_vp9d_comv_size(), DMA_ALIGNMENT) * 2) +
ALIGN(MAX_SUPERFRAME_HEADER_LEN, DMA_ALIGNMENT) +
ALIGN(VP9_UDC_HEADER_BUF_SIZE, DMA_ALIGNMENT) +
ALIGN(VP9_NUM_FRAME_INFO_BUF * CCE_TILE_OFFSET_SIZE, DMA_ALIGNMENT) +
ALIGN(VP9_NUM_FRAME_INFO_BUF * VP9_FRAME_INFO_BUF_SIZE_VPU4X, DMA_ALIGNMENT) +
u32 se_tlb_size = ALIGN(frame_width_coded, DMA_ALIGNMENT);
DMA_ALIGNMENT) * num_vpp_pipes_enc;
return ALIGN(se_tlb_size + se_llb_size, DMA_ALIGNMENT);
DMA_ALIGNMENT) * num_vpp_pipes_enc;
frame_width_coded, DMA_ALIGNMENT);
te_llb_recon_data_size = ALIGN(te_llb_recon_data_size, DMA_ALIGNMENT) * num_vpp_pipes_enc;
DMA_ALIGNMENT);
fb_llb_db_ctrl_size = ALIGN(fe_tlb_size, DMA_ALIGNMENT) * num_cu_in_height_pipe;
fb_llb_db_ctrl_size = ALIGN(fb_llb_db_ctrl_size, DMA_ALIGNMENT) * num_vpp_pipes_enc;
fb_llb_db_luma_size = ALIGN(fe_tlb_size, DMA_ALIGNMENT) * num_cu_in_height_pipe;
fb_llb_db_luma_size = ALIGN(fb_llb_db_luma_size, DMA_ALIGNMENT) * num_vpp_pipes_enc;
fb_llb_db_chroma_size = ALIGN(fe_tlb_size, DMA_ALIGNMENT) * num_cu_in_height_pipe;
fb_llb_db_chroma_size = ALIGN(fb_llb_db_chroma_size, DMA_ALIGNMENT) * num_vpp_pipes_enc;
fb_tlb_db_ctrl_size = ALIGN(fe_tlb_size, DMA_ALIGNMENT) * num_cu_in_width;
fb_llb_sao_ctrl_size = ALIGN(fe_tlb_size, DMA_ALIGNMENT) * num_cu_in_height_pipe;
fb_tlb_sao_ctrl_size = ALIGN(fe_tlb_size, DMA_ALIGNMENT) * num_cu_in_width;
DMA_ALIGNMENT);
fb_tlb_db_luma_size = ALIGN(fe_tlb_size, DMA_ALIGNMENT) * num_cu_in_width;
fb_tlb_db_chroma_size = ALIGN(fe_tlb_size, DMA_ALIGNMENT) * num_cu_in_width;
DMA_ALIGNMENT);
DMA_ALIGNMENT);
u32 md_tlb_size = ALIGN(frame_width_coded, DMA_ALIGNMENT);
DMA_ALIGNMENT) * num_vpp_pipes_enc;
md_llb_size = ALIGN(md_llb_size, DMA_ALIGNMENT);
return ALIGN(md_tlb_size + md_llb_size, DMA_ALIGNMENT);
DMA_ALIGNMENT) * num_vpp_pipes_enc;
DMA_ALIGNMENT) * num_vpp_pipes_enc;
dma_opb_wr2_tlb_uv_size, DMA_ALIGNMENT);
u32 dse_lb_size = ALIGN((256 + (16 * (frame_width_coded >> 4))), DMA_ALIGNMENT);
return ALIGN(VP9_NUM_PROBABILITY_TABLE_BUF * VP9_PROB_TABLE_SIZE, DMA_ALIGNMENT) +
ALIGN(hfi_iris3_vp9d_comv_size(), DMA_ALIGNMENT) +
ALIGN(MAX_SUPERFRAME_HEADER_LEN, DMA_ALIGNMENT) +
ALIGN(VP9_UDC_HEADER_BUF_SIZE, DMA_ALIGNMENT) +
ALIGN(VP9_NUM_FRAME_INFO_BUF * CCE_TILE_OFFSET_SIZE, DMA_ALIGNMENT) +
ALIGN(VP9_NUM_FRAME_INFO_BUF * VP9_FRAME_INFO_BUF_SIZE, DMA_ALIGNMENT) +
DMA_ALIGNMENT);
SIZE_AV1D_METADATA * AV1D_NUM_HW_PIC_BUF), DMA_ALIGNMENT);
return ALIGN(size, DMA_ALIGNMENT);
u32 size = ALIGN(size_bse, DMA_ALIGNMENT) +
ALIGN(size_vpp, DMA_ALIGNMENT) +
ALIGN(SIZE_HW_PIC(SIZE_H264D_HW_PIC_T), DMA_ALIGNMENT);
return ALIGN(size, DMA_ALIGNMENT);
NUM_HW_PIC_BUF, DMA_ALIGNMENT);
u32 _size = ALIGN(_size_bse, DMA_ALIGNMENT) +
ALIGN(_size_vpp, DMA_ALIGNMENT) +
ALIGN(NUM_HW_PIC_BUF * 20 * 22 * 4, DMA_ALIGNMENT) +
(ALIGN(frame_height, LCU_MAX_SIZE_PELS) / LCU_MIN_SIZE_PELS), DMA_ALIGNMENT) +
ALIGN(SIZE_HW_PIC(SIZE_H265D_HW_PIC_T), DMA_ALIGNMENT) +
return ALIGN(_size, DMA_ALIGNMENT);
ALIGN(opb_wr_top_line_luma_buffer_size, DMA_ALIGNMENT) +
DMA_ALIGNMENT) * num_vpp_pipes;
_size = ALIGN(size_h265d_lb_fe_top_data(frame_width, frame_height), DMA_ALIGNMENT) +
ALIGN(size_h265d_lb_fe_top_ctrl(frame_width, frame_height), DMA_ALIGNMENT) +
DMA_ALIGNMENT) * num_vpp_pipes +
DMA_ALIGNMENT) * num_vpp_pipes +
ALIGN(size_h265d_lb_se_top_ctrl(frame_width, frame_height), DMA_ALIGNMENT) +
ALIGN(size_h265d_lb_pe_top_data(frame_width, frame_height), DMA_ALIGNMENT) +
ALIGN(size_h265d_lb_vsp_top(frame_width, frame_height), DMA_ALIGNMENT) +
DMA_ALIGNMENT) * num_vpp_pipes +
DMA_ALIGNMENT) * 4 +
DMA_ALIGNMENT) * num_vpp_pipes;
ALIGN(size_h265d_qp(frame_width, frame_height), DMA_ALIGNMENT);
return ALIGN((_size + vpss_lb_size), DMA_ALIGNMENT);
return ALIGN(size_vpxd_lb_fe_left_ctrl(frame_width, frame_height), DMA_ALIGNMENT) *
ALIGN(size_vpxd_lb_se_left_ctrl(frame_width, frame_height), DMA_ALIGNMENT) *
ALIGN(size_vp9d_lb_vsp_top(frame_width, frame_height), DMA_ALIGNMENT) +
ALIGN(size_vpxd_lb_fe_top_ctrl(frame_width, frame_height), DMA_ALIGNMENT) +
DMA_ALIGNMENT) +
ALIGN(size_vpxd_lb_se_top_ctrl(frame_width, frame_height), DMA_ALIGNMENT) +
ALIGN(size_vp9d_lb_pe_top_data(frame_width, frame_height), DMA_ALIGNMENT) +
ALIGN(size_vp9d_lb_fe_top_data(frame_width, frame_height), DMA_ALIGNMENT) +
ALIGN(size_vp9d_qp(frame_width, frame_height), DMA_ALIGNMENT);
size = ALIGN(size_h264d_lb_fe_top_data(frame_width), DMA_ALIGNMENT) +
ALIGN(size_h264d_lb_fe_top_ctrl(frame_width), DMA_ALIGNMENT) +
ALIGN(size_h264d_lb_fe_left_ctrl(frame_height), DMA_ALIGNMENT) * num_vpp_pipes +
ALIGN(size_h264d_lb_se_top_ctrl(frame_width), DMA_ALIGNMENT) +
ALIGN(size_h264d_lb_se_left_ctrl(frame_height), DMA_ALIGNMENT) * num_vpp_pipes +
ALIGN(size_h264d_lb_pe_top_data(frame_width), DMA_ALIGNMENT) +
ALIGN(size_h264d_lb_vsp_top(frame_width), DMA_ALIGNMENT) +
ALIGN(size_h264d_lb_recon_dma_metadata_wr(frame_height), DMA_ALIGNMENT) * 2 +
ALIGN(size_h264d_qp(frame_width, frame_height), DMA_ALIGNMENT);
size = ALIGN(size, DMA_ALIGNMENT);
return ALIGN((size + vpss_lb_size), DMA_ALIGNMENT);
DMA_ALIGNMENT) +
DMA_ALIGNMENT) +
DMA_ALIGNMENT) * num_vpp_pipes +
DMA_ALIGNMENT) * num_vpp_pipes +
DMA_ALIGNMENT) * num_vpp_pipes +
DMA_ALIGNMENT) +
DMA_ALIGNMENT) +
DMA_ALIGNMENT) +
(frame_width, frame_height), DMA_ALIGNMENT) * 2 +
ALIGN(size_av1d_qp(frame_width, frame_height), DMA_ALIGNMENT);
size = ALIGN((size + opbwrbufsize), DMA_ALIGNMENT);
size = ALIGN((size + vpss_lb_size) * 2, DMA_ALIGNMENT);
DMA_ALIGNMENT) * num_vpp_pipes;
DMA_ALIGNMENT) * num_vpp_pipes;
return ALIGN(size, DMA_ALIGNMENT);
size_bin_hdr = ALIGN(size_bin_hdr / num_vpp_pipes, DMA_ALIGNMENT) * num_vpp_pipes;
size_bin_res = ALIGN(size_bin_res / num_vpp_pipes, DMA_ALIGNMENT) * num_vpp_pipes;
VPX_DECODER_FRAME_CONCURENCY_LVL) / num_vpp_pipes), DMA_ALIGNMENT) +
controller->dma_alignment = DMA_ALIGNMENT;