arch/mips/alchemy/common/dma.c

87

{ AU1000_UART3_PHYS_ADDR + 0x04, DMA_DW8 | DMA_NC }, /* UART3_TX */

arch/mips/alchemy/common/dma.c

88

{ AU1000_UART3_PHYS_ADDR + 0x00, DMA_DW8 | DMA_NC | DMA_DR }, /* UART3_RX */

arch/mips/alchemy/common/dma.c

89

{ AU1000_USB_UDC_PHYS_ADDR + 0x00, DMA_DW8 | DMA_NC | DMA_DR }, /* EP0RD */

arch/mips/alchemy/common/dma.c

90

{ AU1000_USB_UDC_PHYS_ADDR + 0x04, DMA_DW8 | DMA_NC }, /* EP0WR */

arch/mips/alchemy/common/dma.c

91

{ AU1000_USB_UDC_PHYS_ADDR + 0x08, DMA_DW8 | DMA_NC }, /* EP2WR */

arch/mips/alchemy/common/dma.c

92

{ AU1000_USB_UDC_PHYS_ADDR + 0x0c, DMA_DW8 | DMA_NC }, /* EP3WR */

arch/mips/alchemy/common/dma.c

93

{ AU1000_USB_UDC_PHYS_ADDR + 0x10, DMA_DW8 | DMA_NC | DMA_DR }, /* EP4RD */

arch/mips/alchemy/common/dma.c

94

{ AU1000_USB_UDC_PHYS_ADDR + 0x14, DMA_DW8 | DMA_NC | DMA_DR }, /* EP5RD */

arch/mips/alchemy/common/dma.c

96

{ AU1000_I2S_PHYS_ADDR + 0x00, DMA_DW32 | DMA_NC}, /* I2S TX */

arch/mips/alchemy/common/dma.c

97

{ AU1000_I2S_PHYS_ADDR + 0x00, DMA_DW32 | DMA_NC | DMA_DR}, /* I2S RX */

arch/mips/include/asm/mach-au1x00/au1000_dma.h

265

mode &= (DMA_BE | DMA_DR | DMA_TS8 | DMA_DW_MASK | DMA_NC);

arch/mips/include/asm/mach-au1x00/au1000_dma.h

266

chan->mode &= ~(DMA_BE | DMA_DR | DMA_TS8 | DMA_DW_MASK | DMA_NC);

sound/soc/au1x/dma.c

207

get_dma_mode(ctx->stream[s].dma) & ~DMA_NC);