arch/sh/kernel/cpu/sh2/setup-sh7619.c

43

INTC_IRQ(DMAC0, 104), INTC_IRQ(DMAC1, 105),

arch/sh/kernel/cpu/sh2/setup-sh7619.c

54

{ 0xf8080006, 0, 16, 4, /* IPRF */ { DMAC0, DMAC1, DMAC2, DMAC3 } },

arch/sh/kernel/cpu/sh2a/setup-sh7203.c

141

{ 0xfffe0c00, 0, 16, 4, /* IPR06 */ { DMAC0, DMAC1, DMAC2, DMAC3 } },

arch/sh/kernel/cpu/sh2a/setup-sh7203.c

54

INTC_IRQ(DMAC1, 112), INTC_IRQ(DMAC1, 113),

arch/sh/kernel/cpu/sh2a/setup-sh7206.c

110

{ 0xfffe0c00, 0, 16, 4, /* IPR06 */ { DMAC0, DMAC1, DMAC2, DMAC3 } },

arch/sh/kernel/cpu/sh2a/setup-sh7206.c

53

INTC_IRQ(DMAC1, 112), INTC_IRQ(DMAC1, 113),

arch/sh/kernel/cpu/sh2a/setup-sh7264.c

194

{ 0xfffe0c00, 0, 16, 4, /* IPR06 */ { DMAC0, DMAC1, DMAC2, DMAC3 } },

arch/sh/kernel/cpu/sh2a/setup-sh7264.c

61

INTC_IRQ(DMAC1, 112), INTC_IRQ(DMAC1, 113),

arch/sh/kernel/cpu/sh2a/setup-sh7269.c

211

{ 0xfffe0c00, 0, 16, 4, /* IPR06 */ { DMAC0, DMAC1, DMAC2, DMAC3 } },

arch/sh/kernel/cpu/sh2a/setup-sh7269.c

65

INTC_IRQ(DMAC1, 112), INTC_IRQ(DMAC1, 113),

arch/sh/kernel/cpu/sh3/setup-sh7710.c

33

INTC_VECT(DMAC1, 0x800), INTC_VECT(DMAC1, 0x820),

arch/sh/kernel/cpu/sh3/setup-sh7710.c

34

INTC_VECT(DMAC1, 0x840), INTC_VECT(DMAC1, 0x860),

arch/sh/kernel/cpu/sh3/setup-sh7710.c

62

{ 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC1, SCIF0, SCIF1 } },

arch/sh/kernel/cpu/sh3/setup-sh7720.c

245

INTC_VECT(USBF_SPD, 0x6e0), INTC_VECT(DMAC1, 0x800),

arch/sh/kernel/cpu/sh3/setup-sh7720.c

246

INTC_VECT(DMAC1, 0x820), INTC_VECT(DMAC1, 0x840),

arch/sh/kernel/cpu/sh3/setup-sh7720.c

247

INTC_VECT(DMAC1, 0x860), INTC_VECT(LCDC, 0x900),

arch/sh/kernel/cpu/sh3/setup-sh7720.c

271

{ 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } },

arch/sh/kernel/cpu/sh4a/setup-sh7343.c

339

INTC_VECT(DMAC0, 0x800), INTC_VECT(DMAC1, 0x820),

arch/sh/kernel/cpu/sh4a/setup-sh7343.c

368

INTC_GROUP(DMAC0123, DMAC0, DMAC1, DMAC2, DMAC3),

arch/sh/kernel/cpu/sh4a/setup-sh7343.c

382

{ VOU, VIO_VEUI, VIO_BEUI, VIO_CEUI, DMAC3, DMAC2, DMAC1, DMAC0 } },

arch/sh/kernel/cpu/sh4a/setup-sh7366.c

280

INTC_VECT(DMAC0, 0x800), INTC_VECT(DMAC1, 0x820),

arch/sh/kernel/cpu/sh4a/setup-sh7366.c

306

INTC_GROUP(DMAC0123, DMAC0, DMAC1, DMAC2, DMAC3),

arch/sh/kernel/cpu/sh4a/setup-sh7366.c

319

{ VOU, VIO_VEUI, VIO_BEUI, VIO_CEUI, DMAC3, DMAC2, DMAC1, DMAC0 } },

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

556

INTC_VECT(DMAC0, 0x800), INTC_VECT(DMAC1, 0x820),

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

583

INTC_GROUP(DMAC0123, DMAC0, DMAC1, DMAC2, DMAC3),

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

596

{ VOU, VIO_VEUI, VIO_BEUI, VIO_CEUI, DMAC3, DMAC2, DMAC1, DMAC0 } },

arch/sh/kernel/cpu/sh4a/setup-sh7780.c

327

INTC_VECT(DMAC1, 0x7c0), INTC_VECT(DMAC1, 0x7e0),

arch/sh/kernel/cpu/sh4a/setup-sh7780.c

339

INTC_VECT(DMAC1, 0xd80), INTC_VECT(DMAC1, 0xda0),

arch/sh/kernel/cpu/sh4a/setup-sh7780.c

340

INTC_VECT(DMAC1, 0xdc0), INTC_VECT(DMAC1, 0xde0),

arch/sh/kernel/cpu/sh4a/setup-sh7780.c

359

PCIINTA, PCISERR, HAC, CMT, 0, 0, DMAC1, DMAC0,

arch/sh/kernel/cpu/sh4a/setup-sh7780.c

368

{ 0xffd4000c, 0, 32, 8, /* INT2PRI3 */ { HUDI, DMAC0, DMAC1 } },

arch/sh/kernel/cpu/sh4a/setup-sh7785.c

405

INTC_VECT(DMAC1, 0x880), INTC_VECT(DMAC1, 0x8a0),

arch/sh/kernel/cpu/sh4a/setup-sh7785.c

406

INTC_VECT(DMAC1, 0x8c0), INTC_VECT(DMAC1, 0x8e0),

arch/sh/kernel/cpu/sh4a/setup-sh7785.c

407

INTC_VECT(DMAC1, 0x900), INTC_VECT(DMAC1, 0x920),

arch/sh/kernel/cpu/sh4a/setup-sh7785.c

408

INTC_VECT(DMAC1, 0x940),

arch/sh/kernel/cpu/sh4a/setup-sh7785.c

455

PCIINTA, PCISERR, HAC1, HAC0, DMAC1, DMAC0, HUDI, WDT,

arch/sh/kernel/cpu/sh4a/setup-sh7785.c

468

{ 0xffd40010, 0, 32, 8, /* INT2PRI4 */ { HUDI, DMAC0, DMAC1, } },

arch/sh/kernel/cpu/sh4a/setup-shx3.c

252

INTC_GROUP(DMAC1, DMAC1_DMINT6, DMAC1_DMINT7, DMAC1_DMINT8,

arch/sh/kernel/cpu/sh4a/setup-shx3.c

296

{ 0xfe410808, 0, 32, 4, /* INT2PRI2 */ { DMAC1, DMAC0,