Symbol: DIV4_M1
arch/sh/kernel/cpu/sh4a/clock-sh7724.c
158
[DIV4_M1] = DIV4(FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT),
arch/sh/kernel/cpu/sh4a/clock-sh7724.c
272
CLKDEV_CON_ID("vpu_clk", &div4_clks[DIV4_M1]),