DISP_ARB_CTL
intel_de_rmw(display, DISP_ARB_CTL, DISP_FBC_WM_DIS,
!(intel_de_read(display, DISP_ARB_CTL) & DISP_FBC_WM_DIS);
if (intel_uncore_read(uncore, DISP_ARB_CTL) &
intel_uncore_rmw(uncore, DISP_ARB_CTL, 0, DISP_TILE_SURFACE_SWIZZLING);
intel_uncore_read(uncore, DISP_ARB_CTL));
intel_uncore_rmw(&i915->uncore, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);
intel_uncore_write(&i915->uncore, DISP_ARB_CTL,
(intel_uncore_read(&i915->uncore, DISP_ARB_CTL) |
intel_uncore_rmw(&i915->uncore, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);
intel_uncore_rmw(&i915->uncore, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);
intel_uncore_rmw(&i915->uncore, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);
intel_uncore_rmw(&i915->uncore, DISP_ARB_CTL, 0, DISP_FBC_MEMORY_WAKE);
MMIO_D(DISP_ARB_CTL);