DISPC_MGR_FLD_CPR
mgr_fld_write(dispc, channel, DISPC_MGR_FLD_CPR, enable);
[DISPC_MGR_FLD_CPR] = { DISPC_CONFIG, 15, 15 },
[DISPC_MGR_FLD_CPR] = { },
[DISPC_MGR_FLD_CPR] = { DISPC_CONFIG2, 15, 15 },
[DISPC_MGR_FLD_CPR] = { DISPC_CONFIG3, 15, 15 },
mgr_fld_write(channel, DISPC_MGR_FLD_CPR, enable);
[DISPC_MGR_FLD_CPR] = { DISPC_CONFIG, 15, 15 },
[DISPC_MGR_FLD_CPR] = { },
[DISPC_MGR_FLD_CPR] = { DISPC_CONFIG2, 15, 15 },
[DISPC_MGR_FLD_CPR] = { DISPC_CONFIG3, 15, 15 },