arch/x86/events/amd/uncore.c

349

DEFINE_UNCORE_FORMAT_ATTR(event12, event, "config:0-7,32-35");

arch/x86/events/amd/uncore.c

350

DEFINE_UNCORE_FORMAT_ATTR(event14, event, "config:0-7,32-35,59-60"); /* F17h+ DF */

arch/x86/events/amd/uncore.c

351

DEFINE_UNCORE_FORMAT_ATTR(event14v2, event, "config:0-7,32-37"); /* PerfMonV2 DF */

arch/x86/events/amd/uncore.c

352

DEFINE_UNCORE_FORMAT_ATTR(event8, event, "config:0-7"); /* F17h+ L3, PerfMonV2 UMC */

arch/x86/events/amd/uncore.c

353

DEFINE_UNCORE_FORMAT_ATTR(umask8, umask, "config:8-15");

arch/x86/events/amd/uncore.c

354

DEFINE_UNCORE_FORMAT_ATTR(umask12, umask, "config:8-15,24-27"); /* PerfMonV2 DF */

arch/x86/events/amd/uncore.c

355

DEFINE_UNCORE_FORMAT_ATTR(coreid, coreid, "config:42-44"); /* F19h L3 */

arch/x86/events/amd/uncore.c

356

DEFINE_UNCORE_FORMAT_ATTR(slicemask, slicemask, "config:48-51"); /* F17h L3 */

arch/x86/events/amd/uncore.c

357

DEFINE_UNCORE_FORMAT_ATTR(threadmask8, threadmask, "config:56-63"); /* F17h L3 */

arch/x86/events/amd/uncore.c

358

DEFINE_UNCORE_FORMAT_ATTR(threadmask2, threadmask, "config:56-57"); /* F19h L3 */

arch/x86/events/amd/uncore.c

359

DEFINE_UNCORE_FORMAT_ATTR(enallslices, enallslices, "config:46"); /* F19h L3 */

arch/x86/events/amd/uncore.c

360

DEFINE_UNCORE_FORMAT_ATTR(enallcores, enallcores, "config:47"); /* F19h L3 */

arch/x86/events/amd/uncore.c

361

DEFINE_UNCORE_FORMAT_ATTR(sliceid, sliceid, "config:48-50"); /* F19h L3 */

arch/x86/events/amd/uncore.c

362

DEFINE_UNCORE_FORMAT_ATTR(rdwrmask, rdwrmask, "config:8-9"); /* PerfMonV2 UMC */

arch/x86/events/intel/uncore_discovery.c

460

DEFINE_UNCORE_FORMAT_ATTR(event, event, "config:0-7");

arch/x86/events/intel/uncore_discovery.c

461

DEFINE_UNCORE_FORMAT_ATTR(umask, umask, "config:8-15");

arch/x86/events/intel/uncore_discovery.c

462

DEFINE_UNCORE_FORMAT_ATTR(edge, edge, "config:18");

arch/x86/events/intel/uncore_discovery.c

463

DEFINE_UNCORE_FORMAT_ATTR(inv, inv, "config:23");

arch/x86/events/intel/uncore_discovery.c

464

DEFINE_UNCORE_FORMAT_ATTR(thresh, thresh, "config:24-31");

arch/x86/events/intel/uncore_nhmex.c

1153

DEFINE_UNCORE_FORMAT_ATTR(xbr_mm_cfg, xbr_mm_cfg, "config:32-63");

arch/x86/events/intel/uncore_nhmex.c

1154

DEFINE_UNCORE_FORMAT_ATTR(xbr_match, xbr_match, "config1:0-63");

arch/x86/events/intel/uncore_nhmex.c

1155

DEFINE_UNCORE_FORMAT_ATTR(xbr_mask, xbr_mask, "config2:0-63");

arch/x86/events/intel/uncore_nhmex.c

1156

DEFINE_UNCORE_FORMAT_ATTR(qlx_cfg, qlx_cfg, "config1:0-15");

arch/x86/events/intel/uncore_nhmex.c

1157

DEFINE_UNCORE_FORMAT_ATTR(iperf_cfg, iperf_cfg, "config1:0-31");

arch/x86/events/intel/uncore_nhmex.c

192

DEFINE_UNCORE_FORMAT_ATTR(event, event, "config:0-7");

arch/x86/events/intel/uncore_nhmex.c

193

DEFINE_UNCORE_FORMAT_ATTR(event5, event, "config:1-5");

arch/x86/events/intel/uncore_nhmex.c

194

DEFINE_UNCORE_FORMAT_ATTR(umask, umask, "config:8-15");

arch/x86/events/intel/uncore_nhmex.c

195

DEFINE_UNCORE_FORMAT_ATTR(edge, edge, "config:18");

arch/x86/events/intel/uncore_nhmex.c

196

DEFINE_UNCORE_FORMAT_ATTR(inv, inv, "config:23");

arch/x86/events/intel/uncore_nhmex.c

197

DEFINE_UNCORE_FORMAT_ATTR(thresh8, thresh, "config:24-31");

arch/x86/events/intel/uncore_nhmex.c

198

DEFINE_UNCORE_FORMAT_ATTR(counter, counter, "config:6-7");

arch/x86/events/intel/uncore_nhmex.c

199

DEFINE_UNCORE_FORMAT_ATTR(match, match, "config1:0-63");

arch/x86/events/intel/uncore_nhmex.c

200

DEFINE_UNCORE_FORMAT_ATTR(mask, mask, "config2:0-63");

arch/x86/events/intel/uncore_nhmex.c

867

DEFINE_UNCORE_FORMAT_ATTR(count_mode, count_mode, "config:2-3");

arch/x86/events/intel/uncore_nhmex.c

868

DEFINE_UNCORE_FORMAT_ATTR(storage_mode, storage_mode, "config:4-5");

arch/x86/events/intel/uncore_nhmex.c

869

DEFINE_UNCORE_FORMAT_ATTR(wrap_mode, wrap_mode, "config:6");

arch/x86/events/intel/uncore_nhmex.c

870

DEFINE_UNCORE_FORMAT_ATTR(flag_mode, flag_mode, "config:7");

arch/x86/events/intel/uncore_nhmex.c

871

DEFINE_UNCORE_FORMAT_ATTR(inc_sel, inc_sel, "config:9-13");

arch/x86/events/intel/uncore_nhmex.c

872

DEFINE_UNCORE_FORMAT_ATTR(set_flag_sel, set_flag_sel, "config:19-21");

arch/x86/events/intel/uncore_nhmex.c

873

DEFINE_UNCORE_FORMAT_ATTR(filter_cfg_en, filter_cfg_en, "config2:63");

arch/x86/events/intel/uncore_nhmex.c

874

DEFINE_UNCORE_FORMAT_ATTR(filter_match, filter_match, "config2:0-33");

arch/x86/events/intel/uncore_nhmex.c

875

DEFINE_UNCORE_FORMAT_ATTR(filter_mask, filter_mask, "config2:34-61");

arch/x86/events/intel/uncore_nhmex.c

876

DEFINE_UNCORE_FORMAT_ATTR(dsp, dsp, "config1:0-31");

arch/x86/events/intel/uncore_nhmex.c

877

DEFINE_UNCORE_FORMAT_ATTR(thr, thr, "config1:0-31");

arch/x86/events/intel/uncore_nhmex.c

878

DEFINE_UNCORE_FORMAT_ATTR(fvc, fvc, "config1:0-31");

arch/x86/events/intel/uncore_nhmex.c

879

DEFINE_UNCORE_FORMAT_ATTR(pgt, pgt, "config1:0-31");

arch/x86/events/intel/uncore_nhmex.c

880

DEFINE_UNCORE_FORMAT_ATTR(map, map, "config1:0-31");

arch/x86/events/intel/uncore_nhmex.c

881

DEFINE_UNCORE_FORMAT_ATTR(iss, iss, "config1:0-31");

arch/x86/events/intel/uncore_nhmex.c

882

DEFINE_UNCORE_FORMAT_ATTR(pld, pld, "config1:32-63");

arch/x86/events/intel/uncore_snb.c

272

DEFINE_UNCORE_FORMAT_ATTR(event, event, "config:0-7");

arch/x86/events/intel/uncore_snb.c

273

DEFINE_UNCORE_FORMAT_ATTR(umask, umask, "config:8-15");

arch/x86/events/intel/uncore_snb.c

274

DEFINE_UNCORE_FORMAT_ATTR(chmask, chmask, "config:8-11");

arch/x86/events/intel/uncore_snb.c

275

DEFINE_UNCORE_FORMAT_ATTR(edge, edge, "config:18");

arch/x86/events/intel/uncore_snb.c

276

DEFINE_UNCORE_FORMAT_ATTR(inv, inv, "config:23");

arch/x86/events/intel/uncore_snb.c

277

DEFINE_UNCORE_FORMAT_ATTR(cmask5, cmask, "config:24-28");

arch/x86/events/intel/uncore_snb.c

278

DEFINE_UNCORE_FORMAT_ATTR(cmask8, cmask, "config:24-31");

arch/x86/events/intel/uncore_snb.c

279

DEFINE_UNCORE_FORMAT_ATTR(threshold, threshold, "config:24-29");

arch/x86/events/intel/uncore_snb.c

280

DEFINE_UNCORE_FORMAT_ATTR(threshold2, threshold, "config:24-31");

arch/x86/events/intel/uncore_snbep.c

486

DEFINE_UNCORE_FORMAT_ATTR(event, event, "config:0-7");

arch/x86/events/intel/uncore_snbep.c

487

DEFINE_UNCORE_FORMAT_ATTR(event2, event, "config:0-6");

arch/x86/events/intel/uncore_snbep.c

488

DEFINE_UNCORE_FORMAT_ATTR(event_ext, event, "config:0-7,21");

arch/x86/events/intel/uncore_snbep.c

489

DEFINE_UNCORE_FORMAT_ATTR(use_occ_ctr, use_occ_ctr, "config:7");

arch/x86/events/intel/uncore_snbep.c

490

DEFINE_UNCORE_FORMAT_ATTR(umask, umask, "config:8-15");

arch/x86/events/intel/uncore_snbep.c

491

DEFINE_UNCORE_FORMAT_ATTR(umask_ext, umask, "config:8-15,32-43,45-55");

arch/x86/events/intel/uncore_snbep.c

492

DEFINE_UNCORE_FORMAT_ATTR(umask_ext2, umask, "config:8-15,32-57");

arch/x86/events/intel/uncore_snbep.c

493

DEFINE_UNCORE_FORMAT_ATTR(umask_ext3, umask, "config:8-15,32-39");

arch/x86/events/intel/uncore_snbep.c

494

DEFINE_UNCORE_FORMAT_ATTR(umask_ext4, umask, "config:8-15,32-55");

arch/x86/events/intel/uncore_snbep.c

495

DEFINE_UNCORE_FORMAT_ATTR(umask_ext5, umask, "config:8-15,32-63");

arch/x86/events/intel/uncore_snbep.c

496

DEFINE_UNCORE_FORMAT_ATTR(qor, qor, "config:16");

arch/x86/events/intel/uncore_snbep.c

497

DEFINE_UNCORE_FORMAT_ATTR(edge, edge, "config:18");

arch/x86/events/intel/uncore_snbep.c

498

DEFINE_UNCORE_FORMAT_ATTR(tid_en, tid_en, "config:19");

arch/x86/events/intel/uncore_snbep.c

499

DEFINE_UNCORE_FORMAT_ATTR(tid_en2, tid_en, "config:16");

arch/x86/events/intel/uncore_snbep.c

500

DEFINE_UNCORE_FORMAT_ATTR(inv, inv, "config:23");

arch/x86/events/intel/uncore_snbep.c

501

DEFINE_UNCORE_FORMAT_ATTR(inv2, inv, "config:21");

arch/x86/events/intel/uncore_snbep.c

502

DEFINE_UNCORE_FORMAT_ATTR(thresh_ext, thresh_ext, "config:32-35");

arch/x86/events/intel/uncore_snbep.c

503

DEFINE_UNCORE_FORMAT_ATTR(thresh10, thresh, "config:23-32");

arch/x86/events/intel/uncore_snbep.c

504

DEFINE_UNCORE_FORMAT_ATTR(thresh9_2, thresh, "config:23-31");

arch/x86/events/intel/uncore_snbep.c

505

DEFINE_UNCORE_FORMAT_ATTR(thresh9, thresh, "config:24-35");

arch/x86/events/intel/uncore_snbep.c

506

DEFINE_UNCORE_FORMAT_ATTR(thresh8, thresh, "config:24-31");

arch/x86/events/intel/uncore_snbep.c

507

DEFINE_UNCORE_FORMAT_ATTR(thresh6, thresh, "config:24-29");

arch/x86/events/intel/uncore_snbep.c

508

DEFINE_UNCORE_FORMAT_ATTR(thresh5, thresh, "config:24-28");

arch/x86/events/intel/uncore_snbep.c

509

DEFINE_UNCORE_FORMAT_ATTR(occ_sel, occ_sel, "config:14-15");

arch/x86/events/intel/uncore_snbep.c

510

DEFINE_UNCORE_FORMAT_ATTR(occ_invert, occ_invert, "config:30");

arch/x86/events/intel/uncore_snbep.c

511

DEFINE_UNCORE_FORMAT_ATTR(occ_edge, occ_edge, "config:14-51");

arch/x86/events/intel/uncore_snbep.c

512

DEFINE_UNCORE_FORMAT_ATTR(occ_edge_det, occ_edge_det, "config:31");

arch/x86/events/intel/uncore_snbep.c

513

DEFINE_UNCORE_FORMAT_ATTR(port_en, port_en, "config:32-35");

arch/x86/events/intel/uncore_snbep.c

514

DEFINE_UNCORE_FORMAT_ATTR(rs3_sel, rs3_sel, "config:36");

arch/x86/events/intel/uncore_snbep.c

515

DEFINE_UNCORE_FORMAT_ATTR(rx_sel, rx_sel, "config:37");

arch/x86/events/intel/uncore_snbep.c

516

DEFINE_UNCORE_FORMAT_ATTR(tx_sel, tx_sel, "config:38");

arch/x86/events/intel/uncore_snbep.c

517

DEFINE_UNCORE_FORMAT_ATTR(iep_sel, iep_sel, "config:39");

arch/x86/events/intel/uncore_snbep.c

518

DEFINE_UNCORE_FORMAT_ATTR(vc_sel, vc_sel, "config:40-47");

arch/x86/events/intel/uncore_snbep.c

519

DEFINE_UNCORE_FORMAT_ATTR(port_sel, port_sel, "config:48-55");

arch/x86/events/intel/uncore_snbep.c

520

DEFINE_UNCORE_FORMAT_ATTR(ch_mask, ch_mask, "config:36-43");

arch/x86/events/intel/uncore_snbep.c

521

DEFINE_UNCORE_FORMAT_ATTR(ch_mask2, ch_mask, "config:36-47");

arch/x86/events/intel/uncore_snbep.c

522

DEFINE_UNCORE_FORMAT_ATTR(fc_mask, fc_mask, "config:44-46");

arch/x86/events/intel/uncore_snbep.c

523

DEFINE_UNCORE_FORMAT_ATTR(fc_mask2, fc_mask, "config:48-50");

arch/x86/events/intel/uncore_snbep.c

524

DEFINE_UNCORE_FORMAT_ATTR(filter_tid, filter_tid, "config1:0-4");

arch/x86/events/intel/uncore_snbep.c

525

DEFINE_UNCORE_FORMAT_ATTR(filter_tid2, filter_tid, "config1:0");

arch/x86/events/intel/uncore_snbep.c

526

DEFINE_UNCORE_FORMAT_ATTR(filter_tid3, filter_tid, "config1:0-5");

arch/x86/events/intel/uncore_snbep.c

527

DEFINE_UNCORE_FORMAT_ATTR(filter_tid4, filter_tid, "config1:0-8");

arch/x86/events/intel/uncore_snbep.c

528

DEFINE_UNCORE_FORMAT_ATTR(filter_tid5, filter_tid, "config1:0-9");

arch/x86/events/intel/uncore_snbep.c

529

DEFINE_UNCORE_FORMAT_ATTR(filter_cid, filter_cid, "config1:5");

arch/x86/events/intel/uncore_snbep.c

530

DEFINE_UNCORE_FORMAT_ATTR(filter_link, filter_link, "config1:5-8");

arch/x86/events/intel/uncore_snbep.c

531

DEFINE_UNCORE_FORMAT_ATTR(filter_link2, filter_link, "config1:6-8");

arch/x86/events/intel/uncore_snbep.c

532

DEFINE_UNCORE_FORMAT_ATTR(filter_link3, filter_link, "config1:12");

arch/x86/events/intel/uncore_snbep.c

533

DEFINE_UNCORE_FORMAT_ATTR(filter_nid, filter_nid, "config1:10-17");

arch/x86/events/intel/uncore_snbep.c

534

DEFINE_UNCORE_FORMAT_ATTR(filter_nid2, filter_nid, "config1:32-47");

arch/x86/events/intel/uncore_snbep.c

535

DEFINE_UNCORE_FORMAT_ATTR(filter_state, filter_state, "config1:18-22");

arch/x86/events/intel/uncore_snbep.c

536

DEFINE_UNCORE_FORMAT_ATTR(filter_state2, filter_state, "config1:17-22");

arch/x86/events/intel/uncore_snbep.c

537

DEFINE_UNCORE_FORMAT_ATTR(filter_state3, filter_state, "config1:17-23");

arch/x86/events/intel/uncore_snbep.c

538

DEFINE_UNCORE_FORMAT_ATTR(filter_state4, filter_state, "config1:18-20");

arch/x86/events/intel/uncore_snbep.c

539

DEFINE_UNCORE_FORMAT_ATTR(filter_state5, filter_state, "config1:17-26");

arch/x86/events/intel/uncore_snbep.c

540

DEFINE_UNCORE_FORMAT_ATTR(filter_rem, filter_rem, "config1:32");

arch/x86/events/intel/uncore_snbep.c

541

DEFINE_UNCORE_FORMAT_ATTR(filter_loc, filter_loc, "config1:33");

arch/x86/events/intel/uncore_snbep.c

542

DEFINE_UNCORE_FORMAT_ATTR(filter_nm, filter_nm, "config1:36");

arch/x86/events/intel/uncore_snbep.c

543

DEFINE_UNCORE_FORMAT_ATTR(filter_not_nm, filter_not_nm, "config1:37");

arch/x86/events/intel/uncore_snbep.c

544

DEFINE_UNCORE_FORMAT_ATTR(filter_local, filter_local, "config1:33");

arch/x86/events/intel/uncore_snbep.c

545

DEFINE_UNCORE_FORMAT_ATTR(filter_all_op, filter_all_op, "config1:35");

arch/x86/events/intel/uncore_snbep.c

546

DEFINE_UNCORE_FORMAT_ATTR(filter_nnm, filter_nnm, "config1:37");

arch/x86/events/intel/uncore_snbep.c

547

DEFINE_UNCORE_FORMAT_ATTR(filter_opc, filter_opc, "config1:23-31");

arch/x86/events/intel/uncore_snbep.c

548

DEFINE_UNCORE_FORMAT_ATTR(filter_opc2, filter_opc, "config1:52-60");

arch/x86/events/intel/uncore_snbep.c

549

DEFINE_UNCORE_FORMAT_ATTR(filter_opc3, filter_opc, "config1:41-60");

arch/x86/events/intel/uncore_snbep.c

550

DEFINE_UNCORE_FORMAT_ATTR(filter_opc_0, filter_opc0, "config1:41-50");

arch/x86/events/intel/uncore_snbep.c

551

DEFINE_UNCORE_FORMAT_ATTR(filter_opc_1, filter_opc1, "config1:51-60");

arch/x86/events/intel/uncore_snbep.c

552

DEFINE_UNCORE_FORMAT_ATTR(filter_nc, filter_nc, "config1:62");

arch/x86/events/intel/uncore_snbep.c

553

DEFINE_UNCORE_FORMAT_ATTR(filter_c6, filter_c6, "config1:61");

arch/x86/events/intel/uncore_snbep.c

554

DEFINE_UNCORE_FORMAT_ATTR(filter_isoc, filter_isoc, "config1:63");

arch/x86/events/intel/uncore_snbep.c

555

DEFINE_UNCORE_FORMAT_ATTR(filter_band0, filter_band0, "config1:0-7");

arch/x86/events/intel/uncore_snbep.c

556

DEFINE_UNCORE_FORMAT_ATTR(filter_band1, filter_band1, "config1:8-15");

arch/x86/events/intel/uncore_snbep.c

557

DEFINE_UNCORE_FORMAT_ATTR(filter_band2, filter_band2, "config1:16-23");

arch/x86/events/intel/uncore_snbep.c

558

DEFINE_UNCORE_FORMAT_ATTR(filter_band3, filter_band3, "config1:24-31");

arch/x86/events/intel/uncore_snbep.c

559

DEFINE_UNCORE_FORMAT_ATTR(match_rds, match_rds, "config1:48-51");

arch/x86/events/intel/uncore_snbep.c

560

DEFINE_UNCORE_FORMAT_ATTR(match_rnid30, match_rnid30, "config1:32-35");

arch/x86/events/intel/uncore_snbep.c

561

DEFINE_UNCORE_FORMAT_ATTR(match_rnid4, match_rnid4, "config1:31");

arch/x86/events/intel/uncore_snbep.c

562

DEFINE_UNCORE_FORMAT_ATTR(match_dnid, match_dnid, "config1:13-17");

arch/x86/events/intel/uncore_snbep.c

563

DEFINE_UNCORE_FORMAT_ATTR(match_mc, match_mc, "config1:9-12");

arch/x86/events/intel/uncore_snbep.c

564

DEFINE_UNCORE_FORMAT_ATTR(match_opc, match_opc, "config1:5-8");

arch/x86/events/intel/uncore_snbep.c

565

DEFINE_UNCORE_FORMAT_ATTR(match_vnw, match_vnw, "config1:3-4");

arch/x86/events/intel/uncore_snbep.c

566

DEFINE_UNCORE_FORMAT_ATTR(match0, match0, "config1:0-31");

arch/x86/events/intel/uncore_snbep.c

567

DEFINE_UNCORE_FORMAT_ATTR(match1, match1, "config1:32-63");

arch/x86/events/intel/uncore_snbep.c

568

DEFINE_UNCORE_FORMAT_ATTR(mask_rds, mask_rds, "config2:48-51");

arch/x86/events/intel/uncore_snbep.c

569

DEFINE_UNCORE_FORMAT_ATTR(mask_rnid30, mask_rnid30, "config2:32-35");

arch/x86/events/intel/uncore_snbep.c

570

DEFINE_UNCORE_FORMAT_ATTR(mask_rnid4, mask_rnid4, "config2:31");

arch/x86/events/intel/uncore_snbep.c

571

DEFINE_UNCORE_FORMAT_ATTR(mask_dnid, mask_dnid, "config2:13-17");

arch/x86/events/intel/uncore_snbep.c

572

DEFINE_UNCORE_FORMAT_ATTR(mask_mc, mask_mc, "config2:9-12");

arch/x86/events/intel/uncore_snbep.c

573

DEFINE_UNCORE_FORMAT_ATTR(mask_opc, mask_opc, "config2:5-8");

arch/x86/events/intel/uncore_snbep.c

574

DEFINE_UNCORE_FORMAT_ATTR(mask_vnw, mask_vnw, "config2:3-4");

arch/x86/events/intel/uncore_snbep.c

575

DEFINE_UNCORE_FORMAT_ATTR(mask0, mask0, "config2:0-31");

arch/x86/events/intel/uncore_snbep.c

576

DEFINE_UNCORE_FORMAT_ATTR(mask1, mask1, "config2:32-63");