DEF_MUX
DEF_MUX("HP", R9A07G043_CLK_HP, SEL_PLL6_2, sel_pll6_2),
DEF_MUX("HP", R9A07G044_CLK_HP, SEL_PLL6_2, sel_pll6_2),
DEF_MUX(".selsdi", CLK_SEL_SDI, SEL_SDI, sel_sdi),
DEF_MUX(".selcsi0", CLK_SEL_CSI0, SEL_CSI0, sel_csi),
DEF_MUX(".selcsi4", CLK_SEL_CSI4, SEL_CSI4, sel_csi),
DEF_MUX(".selw0", CLK_SEL_W0, SEL_W0, sel_w),
DEF_MUX(".sel_clk_pll0", CLK_SEL_CLK_PLL0, SEL_PLL,
DEF_MUX(".sel_clk_pll1", CLK_SEL_CLK_PLL1, SEL_PLL,
DEF_MUX(".sel_clk_pll2", CLK_SEL_CLK_PLL2, SEL_PLL,
DEF_MUX(".sel_clk_pll4", CLK_SEL_CLK_PLL4, SEL_PLL,
DEF_MUX(".divselxspi0", CLK_DIVSELXSPI0_SCKCR, DIVSEL_XSPI0,
DEF_MUX(".divselxspi1", CLK_DIVSELXSPI1_SCKCR, DIVSEL_XSPI1,
DEF_MUX("PCLKCAN", R9A09G077_PCLKCAN, FSELCANFD,