DEFINE_SG2044_GATE
static DEFINE_SG2044_GATE(CLK_GATE_TPU_SYS, clk_gate_tpu_sys,
static DEFINE_SG2044_GATE(CLK_GATE_NOC_SYS, clk_gate_noc_sys,
static DEFINE_SG2044_GATE(CLK_GATE_VC_SRC0, clk_gate_vc_src0,
static DEFINE_SG2044_GATE(CLK_GATE_VC_SRC1, clk_gate_vc_src1,
static DEFINE_SG2044_GATE(CLK_GATE_DDR0, clk_gate_ddr0,
static DEFINE_SG2044_GATE(CLK_GATE_DDR1, clk_gate_ddr1,
static DEFINE_SG2044_GATE(CLK_GATE_DDR2, clk_gate_ddr2,
static DEFINE_SG2044_GATE(CLK_GATE_DDR3, clk_gate_ddr3,
static DEFINE_SG2044_GATE(CLK_GATE_DDR4, clk_gate_ddr4,
static DEFINE_SG2044_GATE(CLK_GATE_DDR5, clk_gate_ddr5,
static DEFINE_SG2044_GATE(CLK_GATE_DDR6, clk_gate_ddr6,
static DEFINE_SG2044_GATE(CLK_GATE_DDR7, clk_gate_ddr7,
static DEFINE_SG2044_GATE(CLK_GATE_TOP_50M, clk_gate_top_50m,
static DEFINE_SG2044_GATE(CLK_GATE_SC_RX, clk_gate_sc_rx,
static DEFINE_SG2044_GATE(CLK_GATE_SC_RX_X0Y1, clk_gate_sc_rx_x0y1,
static DEFINE_SG2044_GATE(CLK_GATE_TOP_AXI0, clk_gate_top_axi0,
static DEFINE_SG2044_GATE(CLK_GATE_INTC0, clk_gate_intc0,
static DEFINE_SG2044_GATE(CLK_GATE_INTC1, clk_gate_intc1,
static DEFINE_SG2044_GATE(CLK_GATE_INTC2, clk_gate_intc2,
static DEFINE_SG2044_GATE(CLK_GATE_INTC3, clk_gate_intc3,
static DEFINE_SG2044_GATE(CLK_GATE_MAILBOX0, clk_gate_mailbox0,
static DEFINE_SG2044_GATE(CLK_GATE_MAILBOX1, clk_gate_mailbox1,
static DEFINE_SG2044_GATE(CLK_GATE_MAILBOX2, clk_gate_mailbox2,
static DEFINE_SG2044_GATE(CLK_GATE_MAILBOX3, clk_gate_mailbox3,
static DEFINE_SG2044_GATE(CLK_GATE_TOP_AXI_HSPERI, clk_gate_top_axi_hsperi,
static DEFINE_SG2044_GATE(CLK_GATE_APB_TIMER, clk_gate_apb_timer,
static DEFINE_SG2044_GATE(CLK_GATE_TIMER0, clk_gate_timer0,
static DEFINE_SG2044_GATE(CLK_GATE_TIMER1, clk_gate_timer1,
static DEFINE_SG2044_GATE(CLK_GATE_TIMER2, clk_gate_timer2,
static DEFINE_SG2044_GATE(CLK_GATE_TIMER3, clk_gate_timer3,
static DEFINE_SG2044_GATE(CLK_GATE_TIMER4, clk_gate_timer4,
static DEFINE_SG2044_GATE(CLK_GATE_TIMER5, clk_gate_timer5,
static DEFINE_SG2044_GATE(CLK_GATE_TIMER6, clk_gate_timer6,
static DEFINE_SG2044_GATE(CLK_GATE_TIMER7, clk_gate_timer7,
static DEFINE_SG2044_GATE(CLK_GATE_CXP_CFG, clk_gate_cxp_cfg,
static DEFINE_SG2044_GATE(CLK_GATE_CXP_MAC, clk_gate_cxp_mac,
static DEFINE_SG2044_GATE(CLK_GATE_CXP_TEST_PHY, clk_gate_cxp_test_phy,
static DEFINE_SG2044_GATE(CLK_GATE_CXP_TEST_ETH_PHY, clk_gate_cxp_test_eth_phy,
static DEFINE_SG2044_GATE(CLK_GATE_PCIE_1G, clk_gate_pcie_1g,
static DEFINE_SG2044_GATE(CLK_GATE_C2C0_TEST_PHY, clk_gate_c2c0_test_phy,
static DEFINE_SG2044_GATE(CLK_GATE_C2C1_TEST_PHY, clk_gate_c2c1_test_phy,
static DEFINE_SG2044_GATE(CLK_GATE_UART_500M, clk_gate_uart_500m,
static DEFINE_SG2044_GATE(CLK_GATE_APB_UART, clk_gate_apb_uart,
static DEFINE_SG2044_GATE(CLK_GATE_APB_SPI, clk_gate_apb_spi,
static DEFINE_SG2044_GATE(CLK_GATE_AHB_SPIFMC, clk_gate_ahb_spifmc,
static DEFINE_SG2044_GATE(CLK_GATE_APB_I2C, clk_gate_apb_i2c,
static DEFINE_SG2044_GATE(CLK_GATE_AXI_DBG_I2C, clk_gate_axi_dbg_i2c,
static DEFINE_SG2044_GATE(CLK_GATE_GPIO_DB, clk_gate_gpio_db,
static DEFINE_SG2044_GATE(CLK_GATE_APB_GPIO_INTR, clk_gate_apb_gpio_intr,
static DEFINE_SG2044_GATE(CLK_GATE_APB_GPIO, clk_gate_apb_gpio,
static DEFINE_SG2044_GATE(CLK_GATE_SD, clk_gate_sd,
static DEFINE_SG2044_GATE(CLK_GATE_AXI_SD, clk_gate_axi_sd,
static DEFINE_SG2044_GATE(CLK_GATE_SD_100K, clk_gate_sd_100k,
static DEFINE_SG2044_GATE(CLK_GATE_EMMC, clk_gate_emmc,
static DEFINE_SG2044_GATE(CLK_GATE_AXI_EMMC, clk_gate_axi_emmc,
static DEFINE_SG2044_GATE(CLK_GATE_EMMC_100K, clk_gate_emmc_100k,
static DEFINE_SG2044_GATE(CLK_GATE_EFUSE, clk_gate_efuse,
static DEFINE_SG2044_GATE(CLK_GATE_APB_EFUSE, clk_gate_apb_efuse,
static DEFINE_SG2044_GATE(CLK_GATE_SYSDMA_AXI, clk_gate_sysdma_axi,
static DEFINE_SG2044_GATE(CLK_GATE_TX_ETH0, clk_gate_tx_eth0,
static DEFINE_SG2044_GATE(CLK_GATE_AXI_ETH0, clk_gate_axi_eth0,
static DEFINE_SG2044_GATE(CLK_GATE_PTP_REF_I_ETH0, clk_gate_ptp_ref_i_eth0,
static DEFINE_SG2044_GATE(CLK_GATE_REF_ETH0, clk_gate_ref_eth0,
static DEFINE_SG2044_GATE(CLK_GATE_APB_RTC, clk_gate_apb_rtc,
static DEFINE_SG2044_GATE(CLK_GATE_APB_PWM, clk_gate_apb_pwm,
static DEFINE_SG2044_GATE(CLK_GATE_APB_WDT, clk_gate_apb_wdt,
static DEFINE_SG2044_GATE(CLK_GATE_AXI_SRAM, clk_gate_axi_sram,
static DEFINE_SG2044_GATE(CLK_GATE_AHB_ROM, clk_gate_ahb_rom,
static DEFINE_SG2044_GATE(CLK_GATE_PKA, clk_gate_pka,
static DEFINE_SG2044_GATE(CLK_GATE_AP_SYS, clk_gate_ap_sys,
static DEFINE_SG2044_GATE(CLK_GATE_RP_SYS, clk_gate_rp_sys,