drivers/gpu/drm/i915/display/icl_dsi.c

1400

intel_de_rmw(display, DDI_BUF_CTL(port), DDI_BUF_CTL_ENABLE, 0);

drivers/gpu/drm/i915/display/icl_dsi.c

1402

ret = intel_de_wait_for_set_us(display, DDI_BUF_CTL(port),

drivers/gpu/drm/i915/display/icl_dsi.c

534

intel_de_rmw(display, DDI_BUF_CTL(port), 0, DDI_BUF_CTL_ENABLE);

drivers/gpu/drm/i915/display/icl_dsi.c

536

ret = intel_de_wait_for_clear_us(display, DDI_BUF_CTL(port),

drivers/gpu/drm/i915/display/intel_cx0_phy.c

2209

DDI_BUF_CTL(encoder->port)));

drivers/gpu/drm/i915/display/intel_ddi.c

1555

intel_de_write(display, DDI_BUF_CTL(port), intel_dp->DP);

drivers/gpu/drm/i915/display/intel_ddi.c

1556

intel_de_posting_read(display, DDI_BUF_CTL(port));

drivers/gpu/drm/i915/display/intel_ddi.c

196

return DDI_BUF_CTL(port);

drivers/gpu/drm/i915/display/intel_ddi.c

2570

reg = DDI_BUF_CTL(port);

drivers/gpu/drm/i915/display/intel_ddi.c

3067

reg = DDI_BUF_CTL(port);

drivers/gpu/drm/i915/display/intel_ddi.c

3089

intel_de_write(display, DDI_BUF_CTL(port), buf_ctl | DDI_BUF_CTL_ENABLE);

drivers/gpu/drm/i915/display/intel_ddi.c

3090

intel_de_posting_read(display, DDI_BUF_CTL(port));

drivers/gpu/drm/i915/display/intel_ddi.c

3101

intel_de_rmw(display, DDI_BUF_CTL(port), DDI_BUF_CTL_ENABLE, 0);

drivers/gpu/drm/i915/display/intel_ddi.c

4706

dig_port->dp.output_reg = DDI_BUF_CTL(port);

drivers/gpu/drm/i915/display/intel_ddi.c

4918

dig_port->hdmi.hdmi_reg = DDI_BUF_CTL(port);

drivers/gpu/drm/i915/display/intel_ddi.c

4963

if (intel_de_read(display, DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES)

drivers/gpu/drm/i915/display/intel_ddi.c

5104

return intel_de_read(display, DDI_BUF_CTL(PORT_A)) & DDI_INIT_DISPLAY_DETECTED;

drivers/gpu/drm/i915/display/intel_ddi.c

5416

ddi_buf_ctl = intel_de_read(display, DDI_BUF_CTL(port));

drivers/gpu/drm/i915/display/intel_ddi.c

821

tmp = intel_de_read(display, DDI_BUF_CTL(port));

drivers/gpu/drm/i915/display/intel_display.c

7830

if (intel_de_read(display, DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES)

drivers/gpu/drm/i915/display/intel_fdi.c

902

intel_de_write(display, DDI_BUF_CTL(PORT_E),

drivers/gpu/drm/i915/display/intel_fdi.c

906

intel_de_posting_read(display, DDI_BUF_CTL(PORT_E));

drivers/gpu/drm/i915/display/intel_fdi.c

949

intel_de_rmw(display, DDI_BUF_CTL(PORT_E), DDI_BUF_CTL_ENABLE, 0);

drivers/gpu/drm/i915/display/intel_fdi.c

950

intel_de_posting_read(display, DDI_BUF_CTL(PORT_E));

drivers/gpu/drm/i915/display/intel_fdi.c

984

intel_de_rmw(display, DDI_BUF_CTL(PORT_E), DDI_BUF_CTL_ENABLE, 0);

drivers/gpu/drm/i915/display/intel_tc.c

1568

return intel_de_read(display, DDI_BUF_CTL(dig_port->base.port)) &

drivers/gpu/drm/i915/display/intel_tc.c

871

intel_de_rmw(display, DDI_BUF_CTL(port), DDI_BUF_CTL_TC_PHY_OWNERSHIP,

drivers/gpu/drm/i915/display/intel_tc.c

885

val = intel_de_read(display, DDI_BUF_CTL(port));

drivers/gpu/drm/i915/gvt/display.c

232

vgpu_vreg_t(vgpu, DDI_BUF_CTL(port)) &=

drivers/gpu/drm/i915/gvt/display.c

235

vgpu_vreg_t(vgpu, DDI_BUF_CTL(port)) |= DDI_BUF_IS_IDLE;

drivers/gpu/drm/i915/gvt/display.c

295

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) |=

drivers/gpu/drm/i915/gvt/display.c

297

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) &=

drivers/gpu/drm/i915/gvt/display.c

325

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) |=

drivers/gpu/drm/i915/gvt/display.c

327

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) &=

drivers/gpu/drm/i915/gvt/display.c

356

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) |=

drivers/gpu/drm/i915/gvt/display.c

358

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) &=

drivers/gpu/drm/i915/gvt/display.c

438

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) |= DDI_BUF_CTL_ENABLE;

drivers/gpu/drm/i915/gvt/display.c

439

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) &= ~DDI_BUF_IS_IDLE;

drivers/gpu/drm/i915/gvt/display.c

464

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) |= DDI_BUF_CTL_ENABLE;

drivers/gpu/drm/i915/gvt/display.c

465

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) &= ~DDI_BUF_IS_IDLE;

drivers/gpu/drm/i915/gvt/display.c

490

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_D)) |= DDI_BUF_CTL_ENABLE;

drivers/gpu/drm/i915/gvt/display.c

491

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_D)) &= ~DDI_BUF_IS_IDLE;

drivers/gpu/drm/i915/gvt/display.c

510

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) |= DDI_INIT_DISPLAY_DETECTED;

drivers/gpu/drm/i915/gvt/handlers.c

2375

MMIO_DH(DDI_BUF_CTL(PORT_A), D_ALL, NULL, ddi_buf_ctl_mmio_write);

drivers/gpu/drm/i915/gvt/handlers.c

2376

MMIO_DH(DDI_BUF_CTL(PORT_B), D_ALL, NULL, ddi_buf_ctl_mmio_write);

drivers/gpu/drm/i915/gvt/handlers.c

2377

MMIO_DH(DDI_BUF_CTL(PORT_C), D_ALL, NULL, ddi_buf_ctl_mmio_write);

drivers/gpu/drm/i915/gvt/handlers.c

2378

MMIO_DH(DDI_BUF_CTL(PORT_D), D_ALL, NULL, ddi_buf_ctl_mmio_write);

drivers/gpu/drm/i915/gvt/handlers.c

2379

MMIO_DH(DDI_BUF_CTL(PORT_E), D_ALL, NULL, ddi_buf_ctl_mmio_write);

drivers/gpu/drm/i915/gvt/handlers.c

822

if (offset == i915_mmio_reg_offset(DDI_BUF_CTL(PORT_E)))

drivers/gpu/drm/i915/gvt/handlers.c

841

u32 ddi_buf_ctl = vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_E));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

537

MMIO_D(DDI_BUF_CTL(PORT_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

538

MMIO_D(DDI_BUF_CTL(PORT_B));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

539

MMIO_D(DDI_BUF_CTL(PORT_C));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

540

MMIO_D(DDI_BUF_CTL(PORT_D));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

541

MMIO_D(DDI_BUF_CTL(PORT_E));