drivers/gpu/drm/i915/display/intel_display_power.c

1002

mask |= DC_STATE_EN_DC3CO | DC_STATE_EN_UPTO_DC6;

drivers/gpu/drm/i915/display/intel_display_power.c

1008

mask |= DC_STATE_EN_UPTO_DC6;

drivers/gpu/drm/i915/display/intel_display_power.c

1037

sanitize_target_dc_state(display, DC_STATE_EN_UPTO_DC6);

drivers/gpu/drm/i915/display/intel_display_power.c

2313

if (power_domains->allowed_dc_mask & DC_STATE_EN_UPTO_DC6)

drivers/gpu/drm/i915/display/intel_display_power.c

268

DC_STATE_EN_UPTO_DC6,

drivers/gpu/drm/i915/display/intel_display_power_well.c

1079

old_state == DC_STATE_EN_UPTO_DC6)

drivers/gpu/drm/i915/display/intel_display_power_well.c

1120

case DC_STATE_EN_UPTO_DC6:

drivers/gpu/drm/i915/display/intel_display_power_well.c

775

mask |= DC_STATE_EN_DC3CO | DC_STATE_EN_UPTO_DC6

drivers/gpu/drm/i915/display/intel_display_power_well.c

778

mask |= DC_STATE_EN_UPTO_DC6 | DC_STATE_EN_DC9;

drivers/gpu/drm/i915/display/intel_display_power_well.c

782

mask |= DC_STATE_EN_UPTO_DC6;

drivers/gpu/drm/i915/display/intel_display_power_well.c

853

enable_dc6 = state & DC_STATE_EN_UPTO_DC6;

drivers/gpu/drm/i915/display/intel_display_power_well.c

854

dc6_was_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;

drivers/gpu/drm/i915/display/intel_display_power_well.c

935

DC_STATE_EN_UPTO_DC6),

drivers/gpu/drm/i915/display/intel_display_power_well.c

952

intel_dmc_wl_enable(display, DC_STATE_EN_UPTO_DC6);

drivers/gpu/drm/i915/display/intel_display_power_well.c

954

gen9_set_dc_state(display, DC_STATE_EN_UPTO_DC6);

drivers/gpu/drm/i915/display/intel_dmc.c

1606

dc6_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;

drivers/gpu/drm/i915/display/intel_dmc_wl.c

274

case DC_STATE_EN_UPTO_DC6:

drivers/gpu/drm/i915/display/intel_psr.c

1235

intel_display_power_set_target_dc_state(display, DC_STATE_EN_UPTO_DC6);

drivers/gpu/drm/i915/display/intel_psr.c

955

current_dc_state != DC_STATE_EN_UPTO_DC6) ||