Symbol: DC_LOG_DEBUG
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/dcn301_smu.c
139
DC_LOG_DEBUG("%s %x\n", __func__, smu_version);
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/dcn301_smu.c
149
DC_LOG_DEBUG("%s(%d)\n", __func__, requested_dispclk_khz);
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/dcn301_smu.c
164
DC_LOG_DEBUG("%s %d\n", __func__, clk_mgr->base.dprefclk_khz / 1000);
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/dcn301_smu.c
180
DC_LOG_DEBUG("%s(%d)\n", __func__, requested_dcfclk_khz);
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/dcn301_smu.c
194
DC_LOG_DEBUG("%s(%d)\n", __func__, requested_min_ds_dcfclk_khz);
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/dcn301_smu.c
208
DC_LOG_DEBUG("%s(%d)\n", __func__, requested_dpp_khz);
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/dcn301_smu.c
222
DC_LOG_DEBUG("%s(%x)\n", __func__, idle_info);
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/dcn301_smu.c
239
DC_LOG_DEBUG("%s(%d)\n", __func__, enable);
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/dcn301_smu.c
257
DC_LOG_DEBUG("%s(%x)\n", __func__, addr_high);
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/dcn301_smu.c
265
DC_LOG_DEBUG("%s(%x)\n", __func__, addr_low);
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c
132
DC_LOG_DEBUG("Watermarks table not configured properly by SMU");
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.c
148
DC_LOG_DEBUG("Watermarks table not configured properly by SMU");
drivers/gpu/drm/amd/display/dc/core/dc.c
1813
DC_LOG_DEBUG("boot timing validation failed due to force_odm_combine\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1819
DC_LOG_DEBUG("boot timing validation failed due to disabled DIG\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1826
DC_LOG_DEBUG("boot timing validation failed due to unknown DIG engine ID\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1843
DC_LOG_DEBUG("boot timing validation failed due to timing generator instance not found\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1848
DC_LOG_DEBUG("boot timing validation failed due to invalid timing generator count\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1853
DC_LOG_DEBUG("boot timing validation failed due to non-preferred timing generator\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1860
DC_LOG_DEBUG("boot timing validation failed due to missing get_hw_timing callback\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1865
DC_LOG_DEBUG("boot timing validation failed due to failed get_hw_timing return\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1870
DC_LOG_DEBUG("boot timing validation failed due to h_total mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1875
DC_LOG_DEBUG("boot timing validation failed due to h_border_left mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1880
DC_LOG_DEBUG("boot timing validation failed due to h_addressable mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1885
DC_LOG_DEBUG("boot timing validation failed due to h_border_right mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1890
DC_LOG_DEBUG("boot timing validation failed due to h_front_porch mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1895
DC_LOG_DEBUG("boot timing validation failed due to h_sync_width mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1900
DC_LOG_DEBUG("boot timing validation failed due to v_total mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1905
DC_LOG_DEBUG("boot timing validation failed due to v_border_top mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1910
DC_LOG_DEBUG("boot timing validation failed due to v_addressable mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1915
DC_LOG_DEBUG("boot timing validation failed due to v_border_bottom mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1920
DC_LOG_DEBUG("boot timing validation failed due to v_front_porch mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1925
DC_LOG_DEBUG("boot timing validation failed due to v_sync_width mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1939
DC_LOG_DEBUG("boot timing validation failed due to no DSC resource or read function\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1948
DC_LOG_DEBUG("boot timing validation failed due to DSC not enabled in hardware\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1964
DC_LOG_DEBUG("boot timing validation failed due to num_slices_h mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1969
DC_LOG_DEBUG("boot timing validation failed due to num_slices_v mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1974
DC_LOG_DEBUG("boot timing validation failed due to bits_per_pixel mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1979
DC_LOG_DEBUG("boot timing validation failed due to block_pred_enable mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1984
DC_LOG_DEBUG("boot timing validation failed due to linebuf_depth mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1989
DC_LOG_DEBUG("boot timing validation failed due to version_minor mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
1994
DC_LOG_DEBUG("boot timing validation failed due to pixel encoding mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
2023
DC_LOG_DEBUG("boot timing validation failed due to pixels_per_cycle\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
2033
DC_LOG_DEBUG("boot timing validation failed due to pix_clk_100hz mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
2038
DC_LOG_DEBUG("boot timing validation failed due to missing dp_get_pixel_format\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
2046
DC_LOG_DEBUG("boot timing validation failed due to dp_get_pixel_format failure\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
2051
DC_LOG_DEBUG("boot timing validation failed due to display_color_depth mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
2056
DC_LOG_DEBUG("boot timing validation failed due to pixel_encoding mismatch\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
2063
DC_LOG_DEBUG("boot timing validation failed due to VSC SDP colorimetry\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
2068
DC_LOG_DEBUG("boot timing validation failed due to DP 128b/132b\n");
drivers/gpu/drm/amd/display/dc/core/dc.c
6377
DC_LOG_DEBUG("%s: disabled\n", __func__);
drivers/gpu/drm/amd/display/dc/core/dc.c
6398
DC_LOG_DEBUG("%s: %s\n", __func__, allow ? "enabled" : "disabled");
drivers/gpu/drm/amd/display/dc/core/dc.c
6983
DC_LOG_DEBUG("%s: hpd_int_enable(%d)\n", __func__, hpd_int_enable);
drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c
413
DC_LOG_DEBUG("%s: CUR %s(%d) - enc_id(%d)\n",
drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c
426
DC_LOG_DEBUG("%s: NEW %s(%d) - enc_id(%d)\n",
drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c
747
DC_LOG_DEBUG("%s: current_state(%p) mode(%d)\n", __func__, current_state, LINK_ENC_CFG_TRANSIENT);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1000
DC_LOG_DEBUG(" pc[%d] : %08x", i, dc_dmub_srv->dmub->debug.pc[i]);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1001
DC_LOG_DEBUG(" unk_fault_addr : %08x", dc_dmub_srv->dmub->debug.undefined_address_fault_addr);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1002
DC_LOG_DEBUG(" inst_fault_addr : %08x", dc_dmub_srv->dmub->debug.inst_fetch_fault_addr);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1003
DC_LOG_DEBUG(" data_fault_addr : %08x", dc_dmub_srv->dmub->debug.data_write_fault_addr);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1004
DC_LOG_DEBUG(" inbox1_rptr : %08x", dc_dmub_srv->dmub->debug.inbox1_rptr);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1005
DC_LOG_DEBUG(" inbox1_wptr : %08x", dc_dmub_srv->dmub->debug.inbox1_wptr);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1006
DC_LOG_DEBUG(" inbox1_size : %08x", dc_dmub_srv->dmub->debug.inbox1_size);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1007
DC_LOG_DEBUG(" inbox0_rptr : %08x", dc_dmub_srv->dmub->debug.inbox0_rptr);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1008
DC_LOG_DEBUG(" inbox0_wptr : %08x", dc_dmub_srv->dmub->debug.inbox0_wptr);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1009
DC_LOG_DEBUG(" inbox0_size : %08x", dc_dmub_srv->dmub->debug.inbox0_size);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1010
DC_LOG_DEBUG(" outbox1_rptr : %08x", dc_dmub_srv->dmub->debug.outbox1_rptr);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1011
DC_LOG_DEBUG(" outbox1_wptr : %08x", dc_dmub_srv->dmub->debug.outbox1_wptr);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1012
DC_LOG_DEBUG(" outbox1_size : %08x", dc_dmub_srv->dmub->debug.outbox1_size);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1013
DC_LOG_DEBUG(" is_enabled : %d", dc_dmub_srv->dmub->debug.is_dmcub_enabled);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1014
DC_LOG_DEBUG(" is_soft_reset : %d", dc_dmub_srv->dmub->debug.is_dmcub_soft_reset);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1015
DC_LOG_DEBUG(" is_secure_reset : %d", dc_dmub_srv->dmub->debug.is_dmcub_secure_reset);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1016
DC_LOG_DEBUG(" is_traceport_en : %d", dc_dmub_srv->dmub->debug.is_traceport_en);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1017
DC_LOG_DEBUG(" is_cw0_en : %d", dc_dmub_srv->dmub->debug.is_cw0_enabled);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1018
DC_LOG_DEBUG(" is_cw6_en : %d", dc_dmub_srv->dmub->debug.is_cw6_enabled);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1019
DC_LOG_DEBUG(" is_pwait : %d", dc_dmub_srv->dmub->debug.is_pwait);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
1195
DC_LOG_DEBUG("Enabled DPIA trace\n");
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
2421
DC_LOG_DEBUG("%s: PreOS DMCUB Info", __func__);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
2422
DC_LOG_DEBUG("fw_version : 0x%08x", dmub->preos_info.fw_version);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
2423
DC_LOG_DEBUG("boot_options : 0x%08x", dmub->preos_info.boot_options);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
2424
DC_LOG_DEBUG("boot_status : 0x%08x", dmub->preos_info.boot_status);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
2425
DC_LOG_DEBUG("trace_buffer_phy_addr : 0x%016llx", dmub->preos_info.trace_buffer_phy_addr);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
2426
DC_LOG_DEBUG("trace_buffer_size_bytes : 0x%08x", dmub->preos_info.trace_buffer_size);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
2427
DC_LOG_DEBUG("fb_base : 0x%016llx", dmub->preos_info.fb_base);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
2428
DC_LOG_DEBUG("fb_offset : 0x%016llx", dmub->preos_info.fb_offset);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
287
DC_LOG_DEBUG("No reply for DMUB command: status=%d\n", status);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
981
DC_LOG_DEBUG("DMCUB STATE:");
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
982
DC_LOG_DEBUG(" dmcub_version : %08x", dc_dmub_srv->dmub->debug.dmcub_version);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
983
DC_LOG_DEBUG(" scratch [0] : %08x", dc_dmub_srv->dmub->debug.scratch[0]);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
984
DC_LOG_DEBUG(" scratch [1] : %08x", dc_dmub_srv->dmub->debug.scratch[1]);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
985
DC_LOG_DEBUG(" scratch [2] : %08x", dc_dmub_srv->dmub->debug.scratch[2]);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
986
DC_LOG_DEBUG(" scratch [3] : %08x", dc_dmub_srv->dmub->debug.scratch[3]);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
987
DC_LOG_DEBUG(" scratch [4] : %08x", dc_dmub_srv->dmub->debug.scratch[4]);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
988
DC_LOG_DEBUG(" scratch [5] : %08x", dc_dmub_srv->dmub->debug.scratch[5]);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
989
DC_LOG_DEBUG(" scratch [6] : %08x", dc_dmub_srv->dmub->debug.scratch[6]);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
990
DC_LOG_DEBUG(" scratch [7] : %08x", dc_dmub_srv->dmub->debug.scratch[7]);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
991
DC_LOG_DEBUG(" scratch [8] : %08x", dc_dmub_srv->dmub->debug.scratch[8]);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
992
DC_LOG_DEBUG(" scratch [9] : %08x", dc_dmub_srv->dmub->debug.scratch[9]);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
993
DC_LOG_DEBUG(" scratch [10] : %08x", dc_dmub_srv->dmub->debug.scratch[10]);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
994
DC_LOG_DEBUG(" scratch [11] : %08x", dc_dmub_srv->dmub->debug.scratch[11]);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
995
DC_LOG_DEBUG(" scratch [12] : %08x", dc_dmub_srv->dmub->debug.scratch[12]);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
996
DC_LOG_DEBUG(" scratch [13] : %08x", dc_dmub_srv->dmub->debug.scratch[13]);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
997
DC_LOG_DEBUG(" scratch [14] : %08x", dc_dmub_srv->dmub->debug.scratch[14]);
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
998
DC_LOG_DEBUG(" scratch [15] : %08x", dc_dmub_srv->dmub->debug.scratch[15]);
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1268
DC_LOG_DEBUG("%s: dpp_inst(%d) DPPCLK_EN = %d\n", __func__, dpp_inst, enable);
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1539
DC_LOG_DEBUG("%s: OTG%d DTBCLK DTO enabled: pixclk_khz=%d, ref_dtbclk_khz=%d, req_dtbclk_khz=%d, phase=%d, modulo=%d\n",
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1569
DC_LOG_DEBUG("%s: OTG%d DTBCLK DTO disabled\n", __func__, params->otg_inst);
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1614
DC_LOG_DEBUG("%s: dp_hpo_inst(%d) DPSTREAMCLK_EN = %d, DPSTREAMCLK_SRC_SEL = %d\n",
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1651
DC_LOG_DEBUG("%s: dp_hpo_inst(%d) DPSTREAMCLK_ROOT_GATE_DISABLE = %d\n",
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1675
DC_LOG_DEBUG("%s: OTG%d HDMISTREAMCLK_EN = %d, HDMISTREAMCLK_SRC_SEL = %d\n",
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1686
DC_LOG_DEBUG("%s: HDMISTREAMCLK0_ROOT_GATE_DISABLE = %d\n", __func__, enable ? 1 : 0);
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1774
DC_LOG_DEBUG("%s: dpp_inst(%d) PHYESYMCLK_ROOT_GATE_DISABLE: %d\n", __func__, phy_inst, enable ? 0 : 1);
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1847
DC_LOG_DEBUG("%s: phy_inst(%d) PHYxSYMCLK_EN = %d, PHYxSYMCLK_SRC_SEL = %d\n",
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1896
DC_LOG_DEBUG("%s: dpp_inst(%d) clock_on = %d\n", __func__, dpp_inst, clock_on);
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1979
DC_LOG_DEBUG("%s: HDMICHARCLK0_ROOT_GATE_DISABLE = 0\n", __func__);
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2002
DC_LOG_DEBUG("%s: OTG%d SYMCLK32_LE disabled and root clock gating disabled\n",
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2016
DC_LOG_DEBUG("%s: OTG%d DPSTREAMCLK disabled and root clock gating disabled\n",
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
516
DC_LOG_DEBUG("HDMI source set to 24BPP deep color depth\n");
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
523
DC_LOG_DEBUG("HDMI source 30BPP deep color depth" \
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
529
DC_LOG_DEBUG("HDMI source 30BPP deep color depth" \
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
538
DC_LOG_DEBUG("HDMI source 36BPP deep color depth" \
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
544
DC_LOG_DEBUG("HDMI source 36BPP deep color depth" \
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
552
DC_LOG_DEBUG("HDMI source deep color depth enabled in" \
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
577
DC_LOG_DEBUG("%s: enc_id(%d)\n", __func__, enc->preferred_engine);
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
609
DC_LOG_DEBUG("%s: DPIA(%d) - enc_id(%d)\n", __func__, dpia_control.dpia_id, dpia_control.enc_id);
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
624
DC_LOG_DEBUG("%s: enc_id(%d)\n", __func__, enc->preferred_engine);
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
656
DC_LOG_DEBUG("%s: DPIA(%d) - enc_id(%d)\n", __func__, dpia_control.dpia_id, dpia_control.enc_id);
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
670
DC_LOG_DEBUG("%s: enc_id(%d)\n", __func__, enc->preferred_engine);
drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c
702
DC_LOG_DEBUG("%s: DPIA(%d) - enc_id(%d)\n", __func__, dpia_control.dpia_id, dpia_control.enc_id);
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
333
DC_LOG_DEBUG("%s: enc_id(%d)\n", __func__, enc->preferred_engine);
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
348
DC_LOG_DEBUG("%s: enc_id(%d)\n", __func__, enc->preferred_engine);
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
362
DC_LOG_DEBUG("%s: enc_id(%d)\n", __func__, enc->preferred_engine);
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
390
DC_LOG_DEBUG("%s: DPIA(%d) - enc_id(%d)\n", __func__, dpia_control.dpia_id, dpia_control.enc_id);
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
410
DC_LOG_DEBUG("%s: DPIA(%d) - enc_id(%d)\n", __func__, dpia_control.dpia_id, dpia_control.enc_id);
drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_link_encoder.c
47
DC_LOG_DEBUG("Entering [%s]\n", __func__);
drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c
699
DC_LOG_DEBUG("Entering [%s]\n", __func__);
drivers/gpu/drm/amd/display/dc/hpo/dcn30/dcn30_hpo_frl_stream_encoder.c
756
DC_LOG_DEBUG("Exiting [%s]\n", __func__);
drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c
203
DC_LOG_DEBUG("Entering [%s]\n", __func__);
drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c
315
DC_LOG_DEBUG("Exiting [%s]\n", __func__);
drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c
64
DC_LOG_DEBUG("Entering [%s]\n", __func__);
drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c
736
DC_LOG_DEBUG("Entering [%s]\n", __func__);
drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c
793
DC_LOG_DEBUG("Exiting [%s]\n", __func__);
drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.c
90
DC_LOG_DEBUG("Exiting [%s]\n", __func__);
drivers/gpu/drm/amd/display/dc/hpo/dcn42/dcn42_hpo_frl_stream_encoder.c
130
DC_LOG_DEBUG("Exiting [%s]\n", __func__);
drivers/gpu/drm/amd/display/dc/hpo/dcn42/dcn42_hpo_frl_stream_encoder.c
75
DC_LOG_DEBUG("Entering [%s]\n", __func__);
drivers/gpu/drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c
106
DC_LOG_DEBUG("Set DET%d to %d segments\n", hubp_inst, det_size_segments);
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1379
DC_LOG_DEBUG("DML Validation | Running Validation");
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1409
DC_LOG_DEBUG("DML Validation | HUBPRET_CONTROL:DET_BUF_PLANE1_BASE_ADDRESS - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1412
DC_LOG_DEBUG("DML Validation | DCN_EXPANSION_MODE:DRQ_EXPANSION_MODE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1415
DC_LOG_DEBUG("DML Validation | DCN_EXPANSION_MODE:MRQ_EXPANSION_MODE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1418
DC_LOG_DEBUG("DML Validation | DCN_EXPANSION_MODE:DET_BUF_PLANE1_BASE_ADDRESS - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1421
DC_LOG_DEBUG("DML Validation | DCN_EXPANSION_MODE:CRQ_EXPANSION_MODE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1425
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:CHUNK_SIZE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1428
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:MIN_CHUNK_SIZE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1431
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:META_CHUNK_SIZE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1434
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:MIN_META_CHUNK_SIZE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1437
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:DPTE_GROUP_SIZE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1440
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:MPTE_GROUP_SIZE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1443
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:SWATH_HEIGHT - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1446
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:PTE_ROW_HEIGHT_LINEAR - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1450
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG:CHUNK_SIZE_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1453
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG:MIN_CHUNK_SIZE_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1456
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG:META_CHUNK_SIZE_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1459
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG:MIN_META_CHUNK_SIZE_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1462
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG:DPTE_GROUP_SIZE_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1465
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG:MPTE_GROUP_SIZE_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1468
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG:SWATH_HEIGHT_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1471
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG:PTE_ROW_HEIGHT_LINEAR_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1489
DC_LOG_DEBUG("DML Validation | BLANK_OFFSET_0:REFCYC_H_BLANK_END - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1492
DC_LOG_DEBUG("DML Validation | BLANK_OFFSET_0:DLG_V_BLANK_END - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1495
DC_LOG_DEBUG("DML Validation | BLANK_OFFSET_1:MIN_DST_Y_NEXT_START - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1498
DC_LOG_DEBUG("DML Validation | DST_DIMENSIONS:REFCYC_PER_HTOTAL - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1501
DC_LOG_DEBUG("DML Validation | DST_AFTER_SCALER:REFCYC_X_AFTER_SCALER - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1504
DC_LOG_DEBUG("DML Validation | DST_AFTER_SCALER:DST_Y_AFTER_SCALER - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1507
DC_LOG_DEBUG("DML Validation | REF_FREQ_TO_PIX_FREQ:REF_FREQ_TO_PIX_FREQ - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1547
DC_LOG_DEBUG("DML Validation | VBLANK_PARAMETERS_1:REFCYC_PER_PTE_GROUP_VBLANK_L - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1550
DC_LOG_DEBUG("DML Validation | NOM_PARAMETERS_0:DST_Y_PER_PTE_ROW_NOM_L - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1553
DC_LOG_DEBUG("DML Validation | NOM_PARAMETERS_1:REFCYC_PER_PTE_GROUP_NOM_L - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1556
DC_LOG_DEBUG("DML Validation | NOM_PARAMETERS_4:DST_Y_PER_META_ROW_NOM_L - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1559
DC_LOG_DEBUG("DML Validation | NOM_PARAMETERS_5:REFCYC_PER_META_CHUNK_NOM_L - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1562
DC_LOG_DEBUG("DML Validation | PER_LINE_DELIVERY:REFCYC_PER_LINE_DELIVERY_L - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1565
DC_LOG_DEBUG("DML Validation | PER_LINE_DELIVERY:REFCYC_PER_LINE_DELIVERY_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1568
DC_LOG_DEBUG("DML Validation | VBLANK_PARAMETERS_2:REFCYC_PER_PTE_GROUP_VBLANK_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1571
DC_LOG_DEBUG("DML Validation | NOM_PARAMETERS_2:DST_Y_PER_PTE_ROW_NOM_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1574
DC_LOG_DEBUG("DML Validation | NOM_PARAMETERS_3:REFCYC_PER_PTE_GROUP_NOM_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1577
DC_LOG_DEBUG("DML Validation | NOM_PARAMETERS_6:DST_Y_PER_META_ROW_NOM_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1580
DC_LOG_DEBUG("DML Validation | NOM_PARAMETERS_7:REFCYC_PER_META_CHUNK_NOM_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1583
DC_LOG_DEBUG("DML Validation | PER_LINE_DELIVERY_PRE:REFCYC_PER_LINE_DELIVERY_PRE_L - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1586
DC_LOG_DEBUG("DML Validation | PER_LINE_DELIVERY_PRE:REFCYC_PER_LINE_DELIVERY_PRE_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1589
DC_LOG_DEBUG("DML Validation | VBLANK_PARAMETERS_3:REFCYC_PER_META_CHUNK_VBLANK_L - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1592
DC_LOG_DEBUG("DML Validation | VBLANK_PARAMETERS_4:REFCYC_PER_META_CHUNK_VBLANK_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1601
DC_LOG_DEBUG("DML Validation | DCN_TTU_QOS_WM:QoS_LEVEL_LOW_WM - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1604
DC_LOG_DEBUG("DML Validation | DCN_TTU_QOS_WM:QoS_LEVEL_HIGH_WM - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1633
DC_LOG_DEBUG("DML Validation | DCN_SURF0_TTU_CNTL0:REFCYC_PER_REQ_DELIVERY - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1636
DC_LOG_DEBUG("DML Validation | DCN_SURF0_TTU_CNTL0:QoS_LEVEL_FIXED - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1639
DC_LOG_DEBUG("DML Validation | DCN_SURF0_TTU_CNTL0:QoS_RAMP_DISABLE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1642
DC_LOG_DEBUG("DML Validation | DCN_SURF1_TTU_CNTL0:REFCYC_PER_REQ_DELIVERY - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1645
DC_LOG_DEBUG("DML Validation | DCN_SURF1_TTU_CNTL0:QoS_LEVEL_FIXED - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1648
DC_LOG_DEBUG("DML Validation | DCN_SURF1_TTU_CNTL0:QoS_RAMP_DISABLE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1651
DC_LOG_DEBUG("DML Validation | DCN_CUR0_TTU_CNTL0:REFCYC_PER_REQ_DELIVERY - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1654
DC_LOG_DEBUG("DML Validation | DCN_CUR0_TTU_CNTL0:QoS_LEVEL_FIXED - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1657
DC_LOG_DEBUG("DML Validation | DCN_CUR0_TTU_CNTL0:QoS_RAMP_DISABLE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1660
DC_LOG_DEBUG("DML Validation | FLIP_PARAMETERS_1:REFCYC_PER_PTE_GROUP_FLIP_L - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1663
DC_LOG_DEBUG("DML Validation | DCN_CUR0_TTU_CNTL1:REFCYC_PER_REQ_DELIVERY_PRE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1666
DC_LOG_DEBUG("DML Validation | DCN_CUR1_TTU_CNTL1:REFCYC_PER_REQ_DELIVERY_PRE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1669
DC_LOG_DEBUG("DML Validation | DCN_SURF0_TTU_CNTL1:REFCYC_PER_REQ_DELIVERY_PRE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
1672
DC_LOG_DEBUG("DML Validation | DCN_SURF1_TTU_CNTL1:REFCYC_PER_REQ_DELIVERY_PRE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
262
DC_LOG_DEBUG("DML Validation | Running Validation");
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
291
DC_LOG_DEBUG("DML Validation | HUBPRET_CONTROL:DET_BUF_PLANE1_BASE_ADDRESS - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
294
DC_LOG_DEBUG("DML Validation | DCN_EXPANSION_MODE:DRQ_EXPANSION_MODE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
297
DC_LOG_DEBUG("DML Validation | DCN_EXPANSION_MODE:MRQ_EXPANSION_MODE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
300
DC_LOG_DEBUG("DML Validation | DCN_EXPANSION_MODE:DET_BUF_PLANE1_BASE_ADDRESS - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
303
DC_LOG_DEBUG("DML Validation | DCN_EXPANSION_MODE:CRQ_EXPANSION_MODE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
307
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:CHUNK_SIZE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
310
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:MIN_CHUNK_SIZE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
313
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:META_CHUNK_SIZE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
316
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:MIN_META_CHUNK_SIZE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
319
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:DPTE_GROUP_SIZE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
322
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:VM_GROUP_SIZE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
325
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:SWATH_HEIGHT - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
328
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG_C:PTE_ROW_HEIGHT_LINEAR - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
332
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG:CHUNK_SIZE_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
335
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG:MIN_CHUNK_SIZE_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
338
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG:META_CHUNK_SIZE_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
341
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG:MIN_META_CHUNK_SIZE_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
344
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG:DPTE_GROUP_SIZE_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
347
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG:SWATH_HEIGHT_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
350
DC_LOG_DEBUG("DML Validation | DCHUBP_REQ_SIZE_CONFIG:PTE_ROW_HEIGHT_LINEAR_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
369
DC_LOG_DEBUG("DML Validation | BLANK_OFFSET_0:REFCYC_H_BLANK_END - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
372
DC_LOG_DEBUG("DML Validation | BLANK_OFFSET_0:DLG_V_BLANK_END - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
375
DC_LOG_DEBUG("DML Validation | BLANK_OFFSET_1:MIN_DST_Y_NEXT_START - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
378
DC_LOG_DEBUG("DML Validation | DST_DIMENSIONS:REFCYC_PER_HTOTAL - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
381
DC_LOG_DEBUG("DML Validation | DST_AFTER_SCALER:REFCYC_X_AFTER_SCALER - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
384
DC_LOG_DEBUG("DML Validation | DST_AFTER_SCALER:DST_Y_AFTER_SCALER - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
387
DC_LOG_DEBUG("DML Validation | REF_FREQ_TO_PIX_FREQ:REF_FREQ_TO_PIX_FREQ - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
427
DC_LOG_DEBUG("DML Validation | VBLANK_PARAMETERS_1:REFCYC_PER_PTE_GROUP_VBLANK_L - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
430
DC_LOG_DEBUG("DML Validation | NOM_PARAMETERS_0:DST_Y_PER_PTE_ROW_NOM_L - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
433
DC_LOG_DEBUG("DML Validation | NOM_PARAMETERS_1:REFCYC_PER_PTE_GROUP_NOM_L - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
436
DC_LOG_DEBUG("DML Validation | NOM_PARAMETERS_4:DST_Y_PER_META_ROW_NOM_L - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
439
DC_LOG_DEBUG("DML Validation | NOM_PARAMETERS_5:REFCYC_PER_META_CHUNK_NOM_L - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
442
DC_LOG_DEBUG("DML Validation | PER_LINE_DELIVERY:REFCYC_PER_LINE_DELIVERY_L - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
445
DC_LOG_DEBUG("DML Validation | PER_LINE_DELIVERY:REFCYC_PER_LINE_DELIVERY_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
448
DC_LOG_DEBUG("DML Validation | VBLANK_PARAMETERS_2:REFCYC_PER_PTE_GROUP_VBLANK_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
451
DC_LOG_DEBUG("DML Validation | NOM_PARAMETERS_2:DST_Y_PER_PTE_ROW_NOM_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
454
DC_LOG_DEBUG("DML Validation | NOM_PARAMETERS_3:REFCYC_PER_PTE_GROUP_NOM_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
457
DC_LOG_DEBUG("DML Validation | NOM_PARAMETERS_6:DST_Y_PER_META_ROW_NOM_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
460
DC_LOG_DEBUG("DML Validation | NOM_PARAMETERS_7:REFCYC_PER_META_CHUNK_NOM_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
463
DC_LOG_DEBUG("DML Validation | PER_LINE_DELIVERY_PRE:REFCYC_PER_LINE_DELIVERY_PRE_L - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
466
DC_LOG_DEBUG("DML Validation | PER_LINE_DELIVERY_PRE:REFCYC_PER_LINE_DELIVERY_PRE_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
469
DC_LOG_DEBUG("DML Validation | VBLANK_PARAMETERS_3:REFCYC_PER_META_CHUNK_VBLANK_L - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
472
DC_LOG_DEBUG("DML Validation | VBLANK_PARAMETERS_4:REFCYC_PER_META_CHUNK_VBLANK_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
481
DC_LOG_DEBUG("DML Validation | DCN_TTU_QOS_WM:QoS_LEVEL_LOW_WM - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
484
DC_LOG_DEBUG("DML Validation | DCN_TTU_QOS_WM:QoS_LEVEL_HIGH_WM - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
513
DC_LOG_DEBUG("DML Validation | DCN_SURF0_TTU_CNTL0:REFCYC_PER_REQ_DELIVERY - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
516
DC_LOG_DEBUG("DML Validation | DCN_SURF0_TTU_CNTL0:QoS_LEVEL_FIXED - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
519
DC_LOG_DEBUG("DML Validation | DCN_SURF0_TTU_CNTL0:QoS_RAMP_DISABLE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
522
DC_LOG_DEBUG("DML Validation | DCN_SURF1_TTU_CNTL0:REFCYC_PER_REQ_DELIVERY - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
525
DC_LOG_DEBUG("DML Validation | DCN_SURF1_TTU_CNTL0:QoS_LEVEL_FIXED - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
528
DC_LOG_DEBUG("DML Validation | DCN_SURF1_TTU_CNTL0:QoS_RAMP_DISABLE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
531
DC_LOG_DEBUG("DML Validation | DCN_CUR0_TTU_CNTL0:REFCYC_PER_REQ_DELIVERY - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
534
DC_LOG_DEBUG("DML Validation | DCN_CUR0_TTU_CNTL0:QoS_LEVEL_FIXED - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
537
DC_LOG_DEBUG("DML Validation | DCN_CUR0_TTU_CNTL0:QoS_RAMP_DISABLE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
540
DC_LOG_DEBUG("DML Validation | FLIP_PARAMETERS_1:REFCYC_PER_PTE_GROUP_FLIP_L - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
543
DC_LOG_DEBUG("DML Validation | DCN_CUR0_TTU_CNTL1:REFCYC_PER_REQ_DELIVERY_PRE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
546
DC_LOG_DEBUG("DML Validation | DCN_CUR1_TTU_CNTL1:REFCYC_PER_REQ_DELIVERY_PRE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
549
DC_LOG_DEBUG("DML Validation | DCN_SURF0_TTU_CNTL1:REFCYC_PER_REQ_DELIVERY_PRE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
552
DC_LOG_DEBUG("DML Validation | DCN_SURF1_TTU_CNTL1:REFCYC_PER_REQ_DELIVERY_PRE - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
572
DC_LOG_DEBUG("DML Validation | VBLANK_PARAMETERS_5:REFCYC_PER_VM_GROUP_VBLANK - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
575
DC_LOG_DEBUG("DML Validation | VBLANK_PARAMETERS_6:REFCYC_PER_VM_REQ_VBLANK - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
578
DC_LOG_DEBUG("DML Validation | FLIP_PARAMETERS_3:REFCYC_PER_VM_GROUP_FLIP - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
581
DC_LOG_DEBUG("DML Validation | FLIP_PARAMETERS_4:REFCYC_PER_VM_REQ_FLIP - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
584
DC_LOG_DEBUG("DML Validation | FLIP_PARAMETERS_5:REFCYC_PER_PTE_GROUP_FLIP_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
587
DC_LOG_DEBUG("DML Validation | FLIP_PARAMETERS_6:REFCYC_PER_META_CHUNK_FLIP_C - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
590
DC_LOG_DEBUG("DML Validation | FLIP_PARAMETERS_2:REFCYC_PER_META_CHUNK_FLIP_L - Expected: %u Actual: %u\n",
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
1073
DC_LOG_DEBUG(
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
1392
DC_LOG_DEBUG("Reset back end for pipe %d, tg:%d\n",
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
1554
DC_LOG_DEBUG(
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1302
DC_LOG_DEBUG(
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
2913
DC_LOG_DEBUG("Reset back end for pipe %d, tg:%d\n",
drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
623
DC_LOG_DEBUG("Reset back end for pipe %d, tg:%d\n",
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
2130
DC_LOG_DEBUG("Reset back end for pipe %d, tg:%d\n",
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3084
DC_LOG_DEBUG(
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
3178
DC_LOG_DEBUG("Power gated front end %d\n", hubp->inst);
drivers/gpu/drm/amd/display/dc/link/link_dpms.c
1354
DC_LOG_DEBUG("Unknown encoding format\n");
drivers/gpu/drm/amd/display/dc/link/link_dpms.c
2316
DC_LOG_DEBUG("%s: add remote_sink=%s, request_bw=%d\n", __func__,
drivers/gpu/drm/amd/display/dc/link/link_dpms.c
2597
DC_LOG_DEBUG("%s, Link%d HPD is pending, not enable it.\n", __func__, link->link_index);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c
129
DC_LOG_DEBUG("%s: for link(%d) dpia(%d) success, current_hpd_status(%d) new_hpd_status(%d)\n",
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c
89
DC_LOG_DEBUG("%s: Link[%d] DP tunneling support (RouterId=%d AdapterId=%d) "
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
156
DC_LOG_DEBUG("%s: bw_granularity(%d), estimated_bw(%d)\n",
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
159
DC_LOG_DEBUG("%s: nrd_max_link_rate(%d), nrd_max_lane_count(%d)\n",
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
175
DC_LOG_DEBUG("%s: resetting BW alloc config for link(%d)\n",
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
231
DC_LOG_DEBUG("%s: link[%d] DPTX BW allocation mode enabled", __func__, link->link_index);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
256
DC_LOG_DEBUG("%s: link[%d] failed to enable DPTX BW allocation mode", __func__, link->link_index);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
272
DC_LOG_DEBUG("%s: BW Allocation request succeeded on link(%d)",
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
277
DC_LOG_DEBUG("%s: BW Allocation request failed on link(%d) allocated/estimated BW=%d",
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
286
DC_LOG_DEBUG("%s: Granularity changed on link(%d) new granularity=%d",
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
293
DC_LOG_DEBUG("%s: Estimated BW changed on link(%d) new estimated BW=%d",
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
324
DC_LOG_DEBUG("%s: ENTER: link[%d] hpd(%d) Allocated_BW: %d Estimated_BW: %d Req_BW: %d",
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
333
DC_LOG_DEBUG("%s: BW Allocation mode not available", __func__);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
69
DC_LOG_DEBUG("reset usb4 bw alloc of link(%d)\n", link->link_index);
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c
229
DC_LOG_DEBUG("HUBP DPP instance %d, power %s", hubp_dpp_inst,
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c
500
DC_LOG_DEBUG("%s: %s", debug_func, debug_log);
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c
502
DC_LOG_DEBUG("PG_CNTL status:\n");
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c
505
DC_LOG_DEBUG("ONO0=%d (DCCG, DIO, DCIO)\n", block_enabled ? 1 : 0);
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c
508
DC_LOG_DEBUG("ONO1=%d (DCHUBBUB, DCHVM, DCHUBBUBMEM)\n", block_enabled ? 1 : 0);
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c
511
DC_LOG_DEBUG("ONO2=%d (MPC, OPP, OPTC, DWB)\n", block_enabled ? 1 : 0);
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c
514
DC_LOG_DEBUG("ONO3=%d (HPO)\n", block_enabled ? 1 : 0);
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c
518
DC_LOG_DEBUG("ONO%d=%d (DCHUBP%d, DPP%d)\n", 4 + i * 2, block_enabled ? 1 : 0, i, i);
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c
521
DC_LOG_DEBUG("ONO%d=%d (DSC%d)\n", 5 + i * 2, block_enabled ? 1 : 0, i);
drivers/gpu/drm/amd/display/dc/pg/dcn42/dcn42_pg_cntl.c
234
DC_LOG_DEBUG("HUBP DPP instance %d, power %s", hubp_dpp_inst,
drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
1639
DC_LOG_DEBUG("%s: fusing pipe %d\n", __func__, i);