Symbol: DC_IRQ_SOURCE_PFLIP1
drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c
118
[DC_IRQ_SOURCE_PFLIP1 + reg_num] = {\
drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c
359
return DC_IRQ_SOURCE_PFLIP1;
drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c
108
[DC_IRQ_SOURCE_PFLIP1 + reg_num] = {\
drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c
104
[DC_IRQ_SOURCE_PFLIP1 + reg_num] = {\
drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c
292
return DC_IRQ_SOURCE_PFLIP1;
drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c
95
[DC_IRQ_SOURCE_PFLIP1 + reg_num] = {\
drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c
208
[DC_IRQ_SOURCE_PFLIP1 + reg_num] = {\
drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c
86
return DC_IRQ_SOURCE_PFLIP1;
drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c
213
[DC_IRQ_SOURCE_PFLIP1 + reg_num] = {\
drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c
75
return DC_IRQ_SOURCE_PFLIP1;
drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c
157
[DC_IRQ_SOURCE_PFLIP1 + reg_num] = {\
drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c
55
return DC_IRQ_SOURCE_PFLIP1;
drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
235
[DC_IRQ_SOURCE_PFLIP1 + reg_num] = {\
drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
76
return DC_IRQ_SOURCE_PFLIP1;
drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
242
[DC_IRQ_SOURCE_PFLIP1 + reg_num] = {\
drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
84
return DC_IRQ_SOURCE_PFLIP1;
drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c
231
[DC_IRQ_SOURCE_PFLIP1 + reg_num] = {\
drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c
71
return DC_IRQ_SOURCE_PFLIP1;
drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c
155
[DC_IRQ_SOURCE_PFLIP1 + reg_num] = {\
drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c
54
return DC_IRQ_SOURCE_PFLIP1;
drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c
230
[DC_IRQ_SOURCE_PFLIP1 + reg_num] = {\
drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c
72
return DC_IRQ_SOURCE_PFLIP1;
drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c
232
[DC_IRQ_SOURCE_PFLIP1 + reg_num] = {\
drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c
74
return DC_IRQ_SOURCE_PFLIP1;
drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c
237
[DC_IRQ_SOURCE_PFLIP1 + reg_num] = {\
drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c
79
return DC_IRQ_SOURCE_PFLIP1;
drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c
241
[DC_IRQ_SOURCE_PFLIP1 + reg_num] = {\
drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c
73
return DC_IRQ_SOURCE_PFLIP1;
drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
226
IRQ_REG_ENTRY(DC_IRQ_SOURCE_PFLIP1, HUBPREQ, reg_num,\
drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
229
REG_STRUCT[DC_IRQ_SOURCE_PFLIP1 + reg_num].funcs = &pflip_irq_info_funcs\
drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
71
return DC_IRQ_SOURCE_PFLIP1;
drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
205
IRQ_REG_ENTRY(DC_IRQ_SOURCE_PFLIP1, HUBPREQ, reg_num,\
drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
208
REG_STRUCT[DC_IRQ_SOURCE_PFLIP1 + reg_num].funcs = &pflip_irq_info_funcs\
drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
50
return DC_IRQ_SOURCE_PFLIP1;
drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
204
IRQ_REG_ENTRY(DC_IRQ_SOURCE_PFLIP1, HUBPREQ, reg_num,\
drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
207
REG_STRUCT[DC_IRQ_SOURCE_PFLIP1 + reg_num].funcs = &pflip_irq_info_funcs\
drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
49
return DC_IRQ_SOURCE_PFLIP1;
drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
221
[DC_IRQ_SOURCE_PFLIP1 + reg_num] = {\
drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
52
return DC_IRQ_SOURCE_PFLIP1;
drivers/gpu/drm/amd/display/dc/irq/dcn42/irq_service_dcn42.c
219
[DC_IRQ_SOURCE_PFLIP1 + reg_num] = {\
drivers/gpu/drm/amd/display/dc/irq/dcn42/irq_service_dcn42.c
51
return DC_IRQ_SOURCE_PFLIP1;
drivers/gpu/drm/amd/display/dc/irq_types.h
183
IRQ_TYPE_PFLIP = DC_IRQ_SOURCE_PFLIP1,