DEAD
out_le32(&((regs)->control), (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);\
out_le32(&chan->control, (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);
writel((RUN|PAUSE|FLUSH|WAKE|DEAD) << 16, &dma_regs->control);
writel (((RUN|WAKE|DEAD) << 16), &dma_regs->control);
if ((dstat & (RUN|DEAD)) != RUN)
if (ep->parent_ep->com.state != DEAD) {
__state_set(&ep->com, DEAD);
state_set(&ep->com, DEAD);
__state_set(&ep->com, DEAD);
case DEAD:
case DEAD:
__state_set(&ep->com, DEAD);
__state_set(&ep->com, DEAD);
case DEAD:
state_set(&ep->com, DEAD);
ep->com.state = DEAD;
case DEAD:
state_set(&ep->com, DEAD);
case DEAD:
__state_set(&ep->com, DEAD);
__state_set(&ep->com, DEAD);
__state_set(&ep->com, DEAD);
out_le32(&td->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD));
out_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD));
DBDMA_SET(RUN|WAKE) | DBDMA_CLEAR(PAUSE|DEAD));
DBDMA_CLEAR(ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN));
if (xcount == 0 || (dstat & DEAD)) {
if ((fs & (UFLO|LCOL|LCAR|RTRY)) || (dstat & DEAD) || xcount == 0) {
svc_xprt_flag(DEAD) \
if (stat & (ACTIVE|DEAD)) {
if (stat & DEAD) {
out_le32(&chip->playback.dma->control, (RUN|PAUSE|FLUSH|WAKE|DEAD) << 16);
out_le32(&chip->capture.dma->control, (RUN|PAUSE|FLUSH|WAKE|DEAD) << 16);