drivers/gpu/drm/tegra/dc.c

1184

tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/dc.c

1185

(void)tegra_dc_readl(dc, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/dc.c

1188

tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/dc.c

1189

(void)tegra_dc_readl(dc, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/dc.c

1557

DEBUGFS_REG32(DC_CMD_STATE_CONTROL),

drivers/gpu/drm/tegra/dc.c

223

tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/dc.c

224

tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/dc.c

2421

tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/dc.c

2422

value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/dc.c

2425

tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/dc.c

2426

value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/hub.c

202

tegra_dc_writel(dc, mask, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/hub.c

207

value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/hub.c

222

tegra_dc_writel(dc, mask, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/hub.c

227

value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/hub.c

919

tegra_dc_writel(dc, COMMON_UPDATE, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/hub.c

920

tegra_dc_readl(dc, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/hub.c

921

tegra_dc_writel(dc, COMMON_ACTREQ, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/hub.c

922

tegra_dc_readl(dc, DC_CMD_STATE_CONTROL);