Symbol: DDC_DDCMCTL0
drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c
223
sif_set_bit(ddc, DDC_DDCMCTL0, DDCM_SCL_STRECH);
drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c
224
sif_set_bit(ddc, DDC_DDCMCTL0, DDCM_SM0EN);
drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c
225
sif_clr_bit(ddc, DDC_DDCMCTL0, DDCM_ODRAIN);
drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c
232
sif_write_mask(ddc, DDC_DDCMCTL0, DDCM_CLK_DIV_MASK,