drivers/gpu/ipu-v3/ipu-dc.c

217

reg = readl(dc->base + DC_WR_CH_CONF);

drivers/gpu/ipu-v3/ipu-dc.c

222

writel(reg, dc->base + DC_WR_CH_CONF);

drivers/gpu/ipu-v3/ipu-dc.c

250

reg = readl(dc->base + DC_WR_CH_CONF);

drivers/gpu/ipu-v3/ipu-dc.c

252

writel(reg, dc->base + DC_WR_CH_CONF);

drivers/gpu/ipu-v3/ipu-dc.c

260

val = readl(dc->base + DC_WR_CH_CONF);

drivers/gpu/ipu-v3/ipu-dc.c

262

writel(val, dc->base + DC_WR_CH_CONF);

drivers/gpu/ipu-v3/ipu-dc.c

373

priv->channels[1].base + DC_WR_CH_CONF);

drivers/gpu/ipu-v3/ipu-dc.c

375

priv->channels[5].base + DC_WR_CH_CONF);