drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c

2407

DC_LOG_HW_LINK_TRAINING("%s\n Training with LTTPR, max_lane count %d max_link rate %d \n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c

2503

DC_LOG_HW_LINK_TRAINING("%s: Link[%d] LinkRate=0x%x LaneCount=%d",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c

2544

DC_LOG_HW_LINK_TRAINING("%s: Link[%d] Exit. is_success=%d fail_count=%d",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1010

DC_LOG_HW_LINK_TRAINING("%s\n LTTPR Id: %d 0x%X pattern = %x\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1060

DC_LOG_HW_LINK_TRAINING("%s:\n 0x%X MAIN_LINK_CHANNEL_CODING_SET = %x\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1085

DC_LOG_HW_LINK_TRAINING("%s\n %x pattern = %x\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1159

DC_LOG_HW_LINK_TRAINING("%s\n %x rate = %x\n %x lane = %x framing = %x\n %x spread = %x\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1169

DC_LOG_HW_LINK_TRAINING("%s\n %x rate set = %x\n %x lane = %x framing = %x\n %x spread = %x\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1202

DC_LOG_HW_LINK_TRAINING("%s\n LTTPR Repeater ID: %d\n"

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1213

DC_LOG_HW_LINK_TRAINING("%s\n 0x%X VS set = %x PE set = %x max VS Reached = %x max PE Reached = %x\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1262

DC_LOG_HW_LINK_TRAINING("%s\n LTTPR Repeater ID: %d\n 0x%X pattern = %x\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1268

DC_LOG_HW_LINK_TRAINING("%s\n 0x%X pattern = %x\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1287

DC_LOG_HW_LINK_TRAINING("%s:\n LTTPR Repeater ID: %d\n"

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1295

DC_LOG_HW_LINK_TRAINING("%s:\n LTTPR Repeater ID: %d\n"

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1307

DC_LOG_HW_LINK_TRAINING("%s:\n 0x%X TX_FFE_PRESET_VALUE = %x\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1313

DC_LOG_HW_LINK_TRAINING("%s:\n 0x%X VS set = %x PE set = %x max VS Reached = %x max PE Reached = %x\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1358

DC_LOG_HW_LINK_TRAINING("%s\n GPU sends TPS1. Wait 400us.\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1654

DC_LOG_HW_LINK_TRAINING("%s: Beginning link(%d) training attempt %u of %d @ rate(%d) x lane(%d) @ spread = %x\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1748

DC_LOG_HW_LINK_TRAINING(

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1762

DC_LOG_HW_LINK_TRAINING("%s: Aborting training because sink unplugged\n", __func__);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

198

DC_LOG_HW_LINK_TRAINING("%s: Invalid HW Training pattern: %d\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

215

DC_LOG_HW_LINK_TRAINING("%s: Using DP training pattern TPS1\n", __func__);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

219

DC_LOG_HW_LINK_TRAINING("%s: Using DP training pattern TPS2\n", __func__);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

223

DC_LOG_HW_LINK_TRAINING("%s: Using DP training pattern TPS3\n", __func__);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

227

DC_LOG_HW_LINK_TRAINING("%s: Using DP training pattern TPS4\n", __func__);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

231

DC_LOG_HW_LINK_TRAINING("%s: Using DP 128b/132b training pattern TPS1\n", __func__);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

235

DC_LOG_HW_LINK_TRAINING("%s: Using DP 128b/132b training pattern TPS2\n", __func__);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

239

DC_LOG_HW_LINK_TRAINING("%s: Using DP 128b/132b training pattern TPS2 CDS\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

244

DC_LOG_HW_LINK_TRAINING("%s: Using DP training pattern videoidle\n", __func__);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

249

DC_LOG_HW_LINK_TRAINING("%s: Invalid HW Training pattern: %d\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

277

DC_LOG_HW_LINK_TRAINING("%s:\n wait = %d\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

623

DC_LOG_HW_LINK_TRAINING("%s:\n Failed to read from address 0x%X,"

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

643

DC_LOG_HW_LINK_TRAINING("%s:\n LTTPR Repeater ID: %d\n"

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

653

DC_LOG_HW_LINK_TRAINING("%s:\n LTTPR Repeater ID: %d\n"

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

662

DC_LOG_HW_LINK_TRAINING("%s:\n 0x%X Lane01Status = %x\n 0x%X Lane23Status = %x\n ",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

669

DC_LOG_HW_LINK_TRAINING("%s:\n 0x%X Lane01AdjustRequest = %x\n 0x%X Lane23AdjustRequest = %x\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

907

DC_LOG_HW_LINK_TRAINING("%s\n Set LTTPR to Transparent Mode\n", __func__);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

930

DC_LOG_HW_LINK_TRAINING("%s\n Set LTTPR to Transparent Mode\n", __func__);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

944

DC_LOG_HW_LINK_TRAINING("%s\n Set LTTPR to Non Transparent Mode\n", __func__);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c

218

DC_LOG_HW_LINK_TRAINING("%s: Channel EQ done.\n", __func__);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c

224

DC_LOG_HW_LINK_TRAINING("%s: CDS done.\n", __func__);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c

48

DC_LOG_HW_LINK_TRAINING("%s:\n 0x%X TX_FFE_PRESET_VALUE = %x\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

205

DC_LOG_HW_LINK_TRAINING("%s\n GPU sends TPS2. Wait 400us.\n", __func__);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

299

DC_LOG_HW_LINK_TRAINING("%s: Clock recovery OK\n", __func__);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

463

DC_LOG_HW_LINK_TRAINING("%s: Channel EQ done.\n", __func__);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c

486

DC_LOG_HW_LINK_TRAINING("%s: Channel EQ done.\n", __func__);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c

106

DC_LOG_HW_LINK_TRAINING("%s\n DPIA(%d) configuring\n - LTTPR mode(%d)\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c

255

DC_LOG_HW_LINK_TRAINING("%s\n LTTPR Repeater ID: %d\n 0x%X pattern = %x\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c

261

DC_LOG_HW_LINK_TRAINING("%s\n 0x%X pattern = %x\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c

405

DC_LOG_HW_LINK_TRAINING("%s: Clock recovery OK\n", __func__);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c

434

DC_LOG_HW_LINK_TRAINING(

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c

509

DC_LOG_HW_LINK_TRAINING("%s: Clock recovery OK\n", __func__);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c

537

DC_LOG_HW_LINK_TRAINING("%s\n DPIA(%d) clock recovery\n -hop(%d)\n - result(%d)\n - retries(%d)\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c

705

DC_LOG_HW_LINK_TRAINING(

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c

792

DC_LOG_HW_LINK_TRAINING("%s\n DPIA(%d) equalization\n - hop(%d)\n - result(%d)\n - retries(%d)\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c

908

DC_LOG_HW_LINK_TRAINING("%s\n DPIA(%d) end\n - hop(%d)\n - result(%d)\n - LTTPR mode(%d)\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c

949

DC_LOG_HW_LINK_TRAINING("%s\n DPIA(%d) aborting\n - LTTPR mode(%d)\n - HPD(%d)\n",

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c

291

DC_LOG_HW_LINK_TRAINING("%s\n %x rate = %x\n %x lane = %x framing = %x\n %x spread = %x\n",