drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1256

case DC_IP_REQUEST_CNTL:

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3378

seq_state->steps[*seq_state->num_steps].func = DC_IP_REQUEST_CNTL;

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

1043

HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

254

SR(DC_IP_REQUEST_CNTL)

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

319

SR(DC_IP_REQUEST_CNTL)

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

369

SR(DC_IP_REQUEST_CNTL)

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

477

SR(DC_IP_REQUEST_CNTL), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

537

SR(DC_IP_REQUEST_CNTL), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

597

uint32_t DC_IP_REQUEST_CNTL;

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

831

HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

896

HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh)

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

936

HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh)

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

988

HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1017

if (REG(DC_IP_REQUEST_CNTL)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1018

REG_SET(DC_IP_REQUEST_CNTL, 0,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1027

REG_SET(DC_IP_REQUEST_CNTL, 0,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1044

REG_SET(DC_IP_REQUEST_CNTL, 0,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1048

REG_SET(DC_IP_REQUEST_CNTL, 0,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1073

REG_SET(DC_IP_REQUEST_CNTL, 0,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1077

REG_SET(DC_IP_REQUEST_CNTL, 0,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1495

if (REG(DC_IP_REQUEST_CNTL)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1496

REG_SET(DC_IP_REQUEST_CNTL, 0,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1508

REG_SET(DC_IP_REQUEST_CNTL, 0,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1276

if (REG(DC_IP_REQUEST_CNTL)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1277

REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1279

REG_SET(DC_IP_REQUEST_CNTL, 0,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1289

REG_SET(DC_IP_REQUEST_CNTL, 0,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

318

REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

320

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

354

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

474

REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

476

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

533

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0);

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_hwseq.c

171

REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_hwseq.c

173

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);

drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_hwseq.c

222

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

297

REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

299

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

332

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

353

REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

355

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

373

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

456

REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

458

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

482

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

243

REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

245

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

286

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

304

REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

306

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c

325

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

133

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

147

REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

149

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

164

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

89

REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

91

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2959

if (REG(DC_IP_REQUEST_CNTL)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2960

REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2962

REG_SET(DC_IP_REQUEST_CNTL, 0,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2975

if (org_ip_request_cntl == 0 && REG(DC_IP_REQUEST_CNTL))

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2976

REG_SET(DC_IP_REQUEST_CNTL, 0,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3053

if (REG(DC_IP_REQUEST_CNTL)) {

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3054

REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3072

if (org_ip_request_cntl == 0 && REG(DC_IP_REQUEST_CNTL))

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3521

if (REG(DC_IP_REQUEST_CNTL))

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3522

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, enable ? 1 : 0);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3535

if (REG(DC_IP_REQUEST_CNTL))

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3536

REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3547

if (REG(DC_IP_REQUEST_CNTL) && hws->funcs.dpp_pg_control)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3551

if (REG(DC_IP_REQUEST_CNTL) && hws->funcs.hubp_pg_control)

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

101

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

199

REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

201

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

276

REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

278

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

323

REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

325

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

426

REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

428

REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c

99

REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h

111

PG_CNTL_SF(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh)

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h

138

uint32_t DC_IP_REQUEST_CNTL;

drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.h

57

SR(DC_IP_REQUEST_CNTL)

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

731

SR(DC_IP_REQUEST_CNTL), \

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

765

HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

740

SR(DC_IP_REQUEST_CNTL), \

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

777

HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

730

SR(DC_IP_REQUEST_CNTL), \

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

764

HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

725

SR(DC_IP_REQUEST_CNTL), \

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

759

HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

584

SR(DC_IP_REQUEST_CNTL), \

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

620

HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

580

SR(DC_IP_REQUEST_CNTL), \

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

616

HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

598

HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.h

211

SR(DC_IP_REQUEST_CNTL), \

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

578

HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

585

HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.h

67

SR(DC_IP_REQUEST_CNTL), \

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

561

SR(DC_IP_REQUEST_CNTL), \

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

610

HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \