ADV76XX_PAGE_HDMI
[ADV76XX_PAGE_HDMI] = { "hdmi", 0x34 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x0d), 0x04 }, /* HDMI filter optimization */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x0d), 0x04 }, /* HDMI filter optimization */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3d), 0x00 }, /* DDC bus active pull-up control */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3e), 0x74 }, /* TMDS PLL optimization */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x4e), 0x3b }, /* TMDS PLL optimization */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x57), 0x74 }, /* TMDS PLL optimization */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x58), 0x63 }, /* TMDS PLL optimization */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8d), 0x18 }, /* equaliser */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8e), 0x34 }, /* equaliser */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x93), 0x88 }, /* equaliser */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x94), 0x2e }, /* equaliser */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x96), 0x00 }, /* enable automatic EQ changing */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x0d), 0x84 }, /* HDMI filter optimization */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3d), 0x10 }, /* DDC bus active pull-up control */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3e), 0x39 }, /* TMDS PLL optimization */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x4e), 0x3b }, /* TMDS PLL optimization */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x57), 0xb6 }, /* TMDS PLL optimization */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x58), 0x03 }, /* TMDS PLL optimization */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8d), 0x18 }, /* equaliser */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8e), 0x34 }, /* equaliser */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x93), 0x8b }, /* equaliser */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x94), 0x2d }, /* equaliser */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x96), 0x01 }, /* enable automatic EQ changing */
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x9b), 0x03 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x6f), 0x08 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x85), 0x1f },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x87), 0x70 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x57), 0xda },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x58), 0x01 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x03), 0x98 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x4c), 0x44 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8d), 0x04 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8e), 0x1e },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x9b), 0x03 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x6f), 0x08 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x85), 0x1f },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x87), 0x70 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x57), 0xda },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x58), 0x01 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x03), 0x98 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x4c), 0x44 },
BIT(ADV76XX_PAGE_EDID) | BIT(ADV76XX_PAGE_HDMI) |
BIT(ADV76XX_PAGE_HDMI) | BIT(ADV76XX_PAGE_CP),
BIT(ADV76XX_PAGE_HDMI) | BIT(ADV76XX_PAGE_CP),
return adv76xx_read_check(state, ADV76XX_PAGE_HDMI, reg);
return regmap_write(state->regmap[ADV76XX_PAGE_HDMI], reg, val);