drivers/gpu/drm/stm/lvds.c

184

u32 DCR; /* Debug Control Register */

drivers/gpu/drm/stm/lvds.c

214

.DCR = 0x84,

drivers/gpu/drm/stm/lvds.c

240

.DCR = 0x84,

drivers/gpu/drm/stm/lvds.c

536

lvds_set(lvds, phy->base + phy->ofs.DCR, PHY_DCR_POWER_OK);

drivers/net/wan/hd64570.h

143

#define DCR_RX(node) (DCR + (node ? DMAC1RX_OFFSET : DMAC0RX_OFFSET))

drivers/net/wan/hd64570.h

144

#define DCR_TX(node) (DCR + (node ? DMAC1TX_OFFSET : DMAC0TX_OFFSET))

drivers/rtc/rtc-imxdi.c

251

dcr = readl(imxdi->ioaddr + DCR);

drivers/rtc/rtc-imxdi.c

290

di_write_busy_wait(imxdi, DCR_TDCSL, DCR);

drivers/rtc/rtc-imxdi.c

301

dcr = readl(imxdi->ioaddr + DCR);

drivers/rtc/rtc-imxdi.c

329

di_write_busy_wait(imxdi, dcr | DCR_TCE, DCR);

drivers/rtc/rtc-imxdi.c

348

dcr = __raw_readl(imxdi->ioaddr + DCR);

drivers/rtc/rtc-imxdi.c

561

dcr = readl(imxdi->ioaddr + DCR);

drivers/rtc/rtc-imxdi.c

586

return di_write_wait(imxdi, readl(imxdi->ioaddr + DCR) | DCR_TCE, DCR);

drivers/watchdog/ie6xx_wdt.c

192

inl(ie6xx_wdt_data.sch_wdtba + DCR));

include/trace/events/kvm.h

16

ERSN(TPR_ACCESS), ERSN(S390_SIEIC), ERSN(S390_RESET), ERSN(DCR),\

tools/testing/selftests/kvm/lib/kvm_util.c

2026

KVM_EXIT_STRING(DCR),