DCN_1_0__SRCID__DC_HPD1_INT
r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_DCE, DCN_1_0__SRCID__DC_HPD1_INT,
case DCN_1_0__SRCID__DC_HPD1_INT:
case DCN_1_0__SRCID__DC_HPD1_INT:
case DCN_1_0__SRCID__DC_HPD1_INT:
case DCN_1_0__SRCID__DC_HPD1_INT:
case DCN_1_0__SRCID__DC_HPD1_INT:
case DCN_1_0__SRCID__DC_HPD1_INT:
case DCN_1_0__SRCID__DC_HPD1_INT:
case DCN_1_0__SRCID__DC_HPD1_INT:
case DCN_1_0__SRCID__DC_HPD1_INT:
case DCN_1_0__SRCID__DC_HPD1_INT:
case DCN_1_0__SRCID__DC_HPD1_INT:
case DCN_1_0__SRCID__DC_HPD1_INT:
case DCN_1_0__SRCID__DC_HPD1_INT:
case DCN_1_0__SRCID__DC_HPD1_INT:
case DCN_1_0__SRCID__DC_HPD1_INT: