drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h

63

DCE_PANEL_CNTL_SF(LVTMA_PWRSEQ_CNTL, LVTMA_BLON, mask_sh),\

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h

64

DCE_PANEL_CNTL_SF(LVTMA_PWRSEQ_CNTL, LVTMA_BLON_OVRD, mask_sh),\

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h

65

DCE_PANEL_CNTL_SF(LVTMA_PWRSEQ_CNTL, LVTMA_DIGON, mask_sh),\

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h

66

DCE_PANEL_CNTL_SF(LVTMA_PWRSEQ_CNTL, LVTMA_DIGON_OVRD, mask_sh),\

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h

67

DCE_PANEL_CNTL_SF(LVTMA_PWRSEQ_CNTL, LVTMA_PWRSEQ_TARGET_STATE, mask_sh), \

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h

68

DCE_PANEL_CNTL_SF(LVTMA_PWRSEQ_STATE, LVTMA_PWRSEQ_TARGET_STATE_R, mask_sh), \

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h

69

DCE_PANEL_CNTL_SF(LVTMA_PWRSEQ_REF_DIV, BL_PWM_REF_DIV, mask_sh), \

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h

70

DCE_PANEL_CNTL_SF(BL_PWM_PERIOD_CNTL, BL_PWM_PERIOD, mask_sh), \

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h

71

DCE_PANEL_CNTL_SF(BL_PWM_PERIOD_CNTL, BL_PWM_PERIOD_BITCNT, mask_sh), \

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h

72

DCE_PANEL_CNTL_SF(BL_PWM_CNTL, BL_ACTIVE_INT_FRAC_CNT, mask_sh), \

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h

73

DCE_PANEL_CNTL_SF(BL_PWM_CNTL, BL_PWM_FRACTIONAL_EN, mask_sh), \

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h

74

DCE_PANEL_CNTL_SF(BL_PWM_CNTL, BL_PWM_EN, mask_sh), \

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h

75

DCE_PANEL_CNTL_SF(BL_PWM_GRP1_REG_LOCK, BL_PWM_GRP1_IGNORE_MASTER_LOCK_EN, mask_sh), \

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h

76

DCE_PANEL_CNTL_SF(BL_PWM_GRP1_REG_LOCK, BL_PWM_GRP1_REG_LOCK, mask_sh), \

drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h

77

DCE_PANEL_CNTL_SF(BL_PWM_GRP1_REG_LOCK, BL_PWM_GRP1_REG_UPDATE_PENDING, mask_sh)