DBCLK_GPIO2
COMPOSITE_NODIV(DBCLK_GPIO2, "dbclk_gpio2", xin24m_400k_32k_parents_p, 0,
GATE(DBCLK_GPIO2, "dbclk_gpio2", "xin24m", 0,
GATE(DBCLK_GPIO2, "dbclk_gpio2", "dbclk_gpio", 0,
GATE(DBCLK_GPIO2, "dbclk_gpio2", "xin24m", 0,
COMPOSITE(DBCLK_GPIO2, "dbclk_gpio2", mux_24m_32k_p, 0,
COMPOSITE_NODIV(DBCLK_GPIO2, "dbclk_gpio2", mux_xin24m_32k_p, 0,
GATE(DBCLK_GPIO2, "dbclk_gpio2", "xin24m", 0,