DACREG_RMR
sst_dac_read(DACREG_RMR); /* read 4 times RMR */
sst_dac_read(DACREG_RMR);
sst_dac_read(DACREG_RMR);
sst_dac_read(DACREG_RMR);
cr0 = sst_dac_read(DACREG_RMR);
sst_dac_read(DACREG_RMR); /* read 4 times RMR */
sst_dac_read(DACREG_RMR);
sst_dac_read(DACREG_RMR);
sst_dac_read(DACREG_RMR);
sst_dac_write(DACREG_RMR, (cr0 & 0x0f) | DACREG_CR0_16BPP);
sst_dac_read(DACREG_RMR); /* read 4 times RMR */
sst_dac_read(DACREG_RMR);
sst_dac_read(DACREG_RMR);
sst_dac_read(DACREG_RMR);
sst_dac_read(DACREG_RMR);
mir = sst_dac_read(DACREG_RMR);
dir = sst_dac_read(DACREG_RMR);
sst_dac_read(DACREG_RMR); /* read 4 times RMR */
sst_dac_read(DACREG_RMR);
sst_dac_read(DACREG_RMR);
sst_dac_read(DACREG_RMR);
sst_dac_read(DACREG_RMR);
mir = sst_dac_read(DACREG_RMR);
dir = sst_dac_read(DACREG_RMR);
sst_dac_read(DACREG_RMR); /* 1 time: RMR */
sst_dac_read(DACREG_RMR); /* 2 RMR */
sst_dac_read(DACREG_RMR); /* 3 // */
sst_dac_read(DACREG_RMR); /* 4 // */
cr0 = sst_dac_read(DACREG_RMR); /* 5 CR0 */
sst_dac_read(DACREG_RMR);
sst_dac_read(DACREG_RMR);
sst_dac_read(DACREG_RMR);
sst_dac_read(DACREG_RMR);
sst_dac_write(DACREG_RMR, (cr0 & 0xf0)
#define DACREG_DATA_I DACREG_RMR