zynq_clk_register_periph_clk
zynq_clk_register_periph_clk(lqspi, clk_max, clk_output_name[lqspi], NULL,
zynq_clk_register_periph_clk(smc, clk_max, clk_output_name[smc], NULL,
zynq_clk_register_periph_clk(pcap, clk_max, clk_output_name[pcap], NULL,
zynq_clk_register_periph_clk(sdio0, sdio1, clk_output_name[sdio0],
zynq_clk_register_periph_clk(uart0, uart1, clk_output_name[uart0],
zynq_clk_register_periph_clk(spi0, spi1, clk_output_name[spi0],