z8536_write
z8536_write(dev, Z8536_PAB_MODE_PTS_BIT |
z8536_write(dev, 0xff, Z8536_PB_DPP_REG);
z8536_write(dev, 0xff, Z8536_PA_DD_REG);
z8536_write(dev, Z8536_PAB_MODE_PTS_BIT |
z8536_write(dev, 0x7f, Z8536_PB_DPP_REG);
z8536_write(dev, 0xff, Z8536_PB_DD_REG);
z8536_write(dev, 0x09, Z8536_PC_DPP_REG);
z8536_write(dev, 0x0e, Z8536_PC_DD_REG);
z8536_write(dev, Z8536_CMD_CLR_IP_IUS, Z8536_PA_CMDSTAT_REG);
z8536_write(dev, Z8536_CMD_CLR_IE, Z8536_PA_CMDSTAT_REG);
z8536_write(dev, Z8536_CMD_CLR_IP_IUS, Z8536_PB_CMDSTAT_REG);
z8536_write(dev, Z8536_CMD_CLR_IE, Z8536_PB_CMDSTAT_REG);
z8536_write(dev, Z8536_CMD_CLR_IP_IUS, Z8536_CT_CMDSTAT_REG(0));
z8536_write(dev, Z8536_CMD_CLR_IE, Z8536_CT_CMDSTAT_REG(0));
z8536_write(dev, Z8536_CMD_CLR_IP_IUS, Z8536_CT_CMDSTAT_REG(1));
z8536_write(dev, Z8536_CMD_CLR_IE, Z8536_CT_CMDSTAT_REG(1));
z8536_write(dev, Z8536_CMD_CLR_IP_IUS, Z8536_CT_CMDSTAT_REG(2));
z8536_write(dev, Z8536_CMD_CLR_IE, Z8536_CT_CMDSTAT_REG(2));
z8536_write(dev, 0x00, Z8536_INT_CTRL_REG);
z8536_write(dev, cfg, Z8536_CFG_CTRL_REG);
z8536_write(dev, 0x00, Z8536_CT_CMDSTAT_REG(chan));
z8536_write(dev, cfg, Z8536_CFG_CTRL_REG);
z8536_write(dev, val, reg);
z8536_write(dev, 0x00, Z8536_INT_CTRL_REG);
z8536_write(dev, Z8536_CMD_CLR_IE, Z8536_PA_CMDSTAT_REG);
z8536_write(dev, Z8536_CMD_CLR_IE, Z8536_PB_CMDSTAT_REG);
z8536_write(dev, devpriv->pm[pa_trig] & 0xff, Z8536_PA_PM_REG);
z8536_write(dev, devpriv->pt[pa_trig] & 0xff, Z8536_PA_PT_REG);
z8536_write(dev, devpriv->pp[pa_trig] & 0xff, Z8536_PA_PP_REG);
z8536_write(dev, (devpriv->pm[pb_trig] >> 8) & 0xff, Z8536_PB_PM_REG);
z8536_write(dev, (devpriv->pt[pb_trig] >> 8) & 0xff, Z8536_PB_PT_REG);
z8536_write(dev, (devpriv->pp[pb_trig] >> 8) & 0xff, Z8536_PB_PP_REG);
z8536_write(dev, val, Z8536_PA_MODE_REG);
z8536_write(dev, Z8536_CMD_SET_IE, Z8536_PA_CMDSTAT_REG);
z8536_write(dev, val, Z8536_PB_MODE_REG);
z8536_write(dev, Z8536_CMD_SET_IE, Z8536_PB_CMDSTAT_REG);
z8536_write(dev, Z8536_INT_CTRL_MIE | Z8536_INT_CTRL_DLC,
z8536_write(dev, val & 0xff, Z8536_CT_RELOAD_LSB_REG(chan));
z8536_write(dev, (val >> 8) & 0xff,
z8536_write(dev, Z8536_CT_CMDSTAT_GCB,
z8536_write(dev, val, Z8536_CT_MODE_REG(chan));
z8536_write(dev, val, Z8536_CT_MODE_REG(chan));
z8536_write(dev, cmd, Z8536_CT_CMDSTAT_REG(chan));
z8536_write(dev, cmd, Z8536_CT_CMDSTAT_REG(chan));
z8536_write(dev, 0x00, Z8536_CFG_CTRL_REG);