xw32
xw32(CSR9, 1 << 12); /* enable boot rom access */
xw32(CSR10, i);
xw32(CSR10, i + 1);
xw32(CSR10, i + 2);
xw32(CSR10, i + 3);
xw32(CSR10, i + j + 4);
xw32(CSR15, 0x0008);
xw32(CSR15, 0xa8050000);
xw32(CSR15, 0xa00f0000);
xw32(CSR5, status);
xw32(CSR0, val);
xw32(CSR0, val);
xw32(CSR0, val);
xw32(CSR1, 0);
xw32(CSR2, 0);
xw32(CSR3, address); /* Receive descr list address */
xw32(CSR4, address); /* xmit descr list address */
xw32(CSR3, val); /* Receive descriptor address */
xw32(CSR4, val); /* Send descriptor address */
xw32(CSR5, val);
xw32(CSR6, val);
xw32(CSR6, val);
xw32(CSR6, val);
xw32(CSR6, val);
xw32(CSR6, val);
xw32(CSR6, val);
xw32(CSR7, val);
xw32(CSR7, val);
xw32(CSR7, val);
xw32(CSR7, 0);
xw32(CSR7, val);
xw32(CSR6, val);