drivers/i2c/busses/i2c-xiic.c

1076

xiic_setreg32(i2c, XIIC_DGIER_OFFSET, XIIC_GINTR_ENABLE_MASK);

drivers/i2c/busses/i2c-xiic.c

1502

xiic_setreg32(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK);

drivers/i2c/busses/i2c-xiic.c

331

xiic_setreg32(i2c, XIIC_IIER_OFFSET, ier & ~mask);

drivers/i2c/busses/i2c-xiic.c

338

xiic_setreg32(i2c, XIIC_IIER_OFFSET, ier | mask);

drivers/i2c/busses/i2c-xiic.c

345

xiic_setreg32(i2c, XIIC_IISR_OFFSET, isr & mask);

drivers/i2c/busses/i2c-xiic.c

447

xiic_setreg32(i2c, XIIC_THIGH_REG_OFFSET, reg_val - 1);

drivers/i2c/busses/i2c-xiic.c

450

xiic_setreg32(i2c, XIIC_TLOW_REG_OFFSET, reg_val - 1);

drivers/i2c/busses/i2c-xiic.c

454

xiic_setreg32(i2c, XIIC_TSUSTA_REG_OFFSET, reg_val - 1);

drivers/i2c/busses/i2c-xiic.c

458

xiic_setreg32(i2c, XIIC_TSUSTO_REG_OFFSET, reg_val - 1);

drivers/i2c/busses/i2c-xiic.c

462

xiic_setreg32(i2c, XIIC_THDSTA_REG_OFFSET, reg_val - 1);

drivers/i2c/busses/i2c-xiic.c

466

xiic_setreg32(i2c, XIIC_TSUDAT_REG_OFFSET, reg_val - 1);

drivers/i2c/busses/i2c-xiic.c

470

xiic_setreg32(i2c, XIIC_TBUF_REG_OFFSET, reg_val - 1);

drivers/i2c/busses/i2c-xiic.c

473

xiic_setreg32(i2c, XIIC_THDDAT_REG_OFFSET, 1);

drivers/i2c/busses/i2c-xiic.c

482

xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK);

drivers/i2c/busses/i2c-xiic.c

504

xiic_setreg32(i2c, XIIC_DGIER_OFFSET, XIIC_GINTR_ENABLE_MASK);

drivers/i2c/busses/i2c-xiic.c

515

xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK);

drivers/i2c/busses/i2c-xiic.c

887

xiic_setreg32(i2c, XIIC_IISR_OFFSET, clr);