Symbol: D1VGA_CONTROL
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
529
if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) {
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
520
if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) {
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
794
if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) {
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
965
if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) {
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
1073
if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) {
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
1265
if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) {
drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c
1832
set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_MODE_ENABLE);
drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c
1833
set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_TIMING_SELECT);
drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c
1835
value, 0, D1VGA_CONTROL, D1VGA_SYNC_POLARITY_SELECT);
drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c
1836
set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_OVERSCAN_COLOR_EN);
drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
419
set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_MODE_ENABLE);
drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
420
set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_TIMING_SELECT);
drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
422
value, 0, D1VGA_CONTROL, D1VGA_SYNC_POLARITY_SELECT);
drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
423
set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_OVERSCAN_COLOR_EN);
drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h
249
SR(D1VGA_CONTROL), \
drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h
313
SR(D1VGA_CONTROL), \
drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h
363
SR(D1VGA_CONTROL), \
drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h
471
SR(D1VGA_CONTROL), \
drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h
531
SR(D1VGA_CONTROL), \
drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h
561
SR(D1VGA_CONTROL), \
drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h
659
uint32_t D1VGA_CONTROL;
drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h
834
HWS_SF(, D1VGA_CONTROL, D1VGA_MODE_ENABLE, mask_sh),\
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
905
REG_GET(D1VGA_CONTROL, D1VGA_MODE_ENABLE, &in_vga1_mode);
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
914
REG_WRITE(D1VGA_CONTROL, 0);
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
370
REG_WRITE(D1VGA_CONTROL, 0);
drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
766
SR(D1VGA_CONTROL), \
drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
775
SR(D1VGA_CONTROL), \
drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
765
SR(D1VGA_CONTROL), \
drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
760
SR(D1VGA_CONTROL), \
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
619
SR(D1VGA_CONTROL), \
drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
609
SR(D1VGA_CONTROL), \