drivers/gpu/drm/xe/xe_lmtt.c

257

struct xe_tlb_inval_fence fences[XE_MAX_GT_PER_TILE];

drivers/gpu/drm/xe/xe_lmtt.c

258

struct xe_tlb_inval_fence *fence = fences;

drivers/gpu/drm/xe/xe_page_reclaim.c

68

struct xe_tlb_inval_fence *fence)

drivers/gpu/drm/xe/xe_page_reclaim.h

20

struct xe_tlb_inval_fence;

drivers/gpu/drm/xe/xe_page_reclaim.h

78

struct xe_tlb_inval_fence *fence);

drivers/gpu/drm/xe/xe_tlb_inval.c

179

struct xe_tlb_inval_fence *fence, *next;

drivers/gpu/drm/xe/xe_tlb_inval.c

247

static void xe_tlb_inval_fence_prep(struct xe_tlb_inval_fence *fence)

drivers/gpu/drm/xe/xe_tlb_inval.c

298

struct xe_tlb_inval_fence *fence)

drivers/gpu/drm/xe/xe_tlb_inval.c

314

struct xe_tlb_inval_fence fence, *fence_ptr = &fence;

drivers/gpu/drm/xe/xe_tlb_inval.c

32

static void xe_tlb_inval_fence_fini(struct xe_tlb_inval_fence *fence)

drivers/gpu/drm/xe/xe_tlb_inval.c

341

struct xe_tlb_inval_fence *fence, u64 start, u64 end,

drivers/gpu/drm/xe/xe_tlb_inval.c

357

struct xe_tlb_inval_fence fence;

drivers/gpu/drm/xe/xe_tlb_inval.c

375

struct xe_tlb_inval_fence *fence, *next;

drivers/gpu/drm/xe/xe_tlb_inval.c

42

xe_tlb_inval_fence_signal(struct xe_tlb_inval_fence *fence)

drivers/gpu/drm/xe/xe_tlb_inval.c

455

struct xe_tlb_inval_fence *fence,

drivers/gpu/drm/xe/xe_tlb_inval.c

499

struct xe_tlb_inval_fence *fence = &batch->fence[0];

drivers/gpu/drm/xe/xe_tlb_inval.c

528

struct xe_tlb_inval_fence *fence = &batch->fence[0];

drivers/gpu/drm/xe/xe_tlb_inval.c

60

xe_tlb_inval_fence_signal_unlocked(struct xe_tlb_inval_fence *fence)

drivers/gpu/drm/xe/xe_tlb_inval.c

74

struct xe_tlb_inval_fence *fence, *next;

drivers/gpu/drm/xe/xe_tlb_inval.h

21

struct xe_tlb_inval_fence *fence);

drivers/gpu/drm/xe/xe_tlb_inval.h

25

struct xe_tlb_inval_fence *fence,

drivers/gpu/drm/xe/xe_tlb_inval.h

29

struct xe_tlb_inval_fence *fence,

drivers/gpu/drm/xe/xe_tlb_inval.h

39

xe_tlb_inval_fence_wait(struct xe_tlb_inval_fence *fence)

drivers/gpu/drm/xe/xe_tlb_inval_job.c

105

struct xe_tlb_inval_fence *ifence;

drivers/gpu/drm/xe/xe_tlb_inval_job.c

178

struct xe_tlb_inval_fence *ifence =

drivers/gpu/drm/xe/xe_tlb_inval_job.c

237

struct xe_tlb_inval_fence *ifence =

drivers/gpu/drm/xe/xe_tlb_inval_job.c

52

struct xe_tlb_inval_fence *ifence =

drivers/gpu/drm/xe/xe_tlb_inval_types.h

144

struct xe_tlb_inval_fence fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];

drivers/gpu/drm/xe/xe_trace.h

29

DECLARE_EVENT_CLASS(xe_tlb_inval_fence,

drivers/gpu/drm/xe/xe_trace.h

30

TP_PROTO(struct xe_device *xe, struct xe_tlb_inval_fence *fence),

drivers/gpu/drm/xe/xe_trace.h

35

__field(struct xe_tlb_inval_fence *, fence)

drivers/gpu/drm/xe/xe_trace.h

49

DEFINE_EVENT(xe_tlb_inval_fence, xe_tlb_inval_fence_send,

drivers/gpu/drm/xe/xe_trace.h

50

TP_PROTO(struct xe_device *xe, struct xe_tlb_inval_fence *fence),

drivers/gpu/drm/xe/xe_trace.h

54

DEFINE_EVENT(xe_tlb_inval_fence, xe_tlb_inval_fence_recv,

drivers/gpu/drm/xe/xe_trace.h

55

TP_PROTO(struct xe_device *xe, struct xe_tlb_inval_fence *fence),

drivers/gpu/drm/xe/xe_trace.h

59

DEFINE_EVENT(xe_tlb_inval_fence, xe_tlb_inval_fence_signal,

drivers/gpu/drm/xe/xe_trace.h

60

TP_PROTO(struct xe_device *xe, struct xe_tlb_inval_fence *fence),

drivers/gpu/drm/xe/xe_trace.h

64

DEFINE_EVENT(xe_tlb_inval_fence, xe_tlb_inval_fence_timeout,

drivers/gpu/drm/xe/xe_trace.h

65

TP_PROTO(struct xe_device *xe, struct xe_tlb_inval_fence *fence),