zynqmp_pm_sec_read_reg

116

return zynqmp_pm_sec_read_reg(PM_REGNODE_EFUSE_CACHE, UFS_CAL_1_OFFSET, val);

44

ret = zynqmp_pm_sec_read_reg(PM_REGNODE_PMC_IOU_SLCR, TXRX_CFGRDY_OFFSET, &regval);

72

ret = zynqmp_pm_sec_read_reg(PM_REGNODE_PMC_IOU_SLCR, SRAM_CSR_OFFSET, &regval);

96

ret = zynqmp_pm_sec_read_reg(PM_REGNODE_PMC_IOU_SLCR, SRAM_CSR_OFFSET, &sram_csr);

1633

EXPORT_SYMBOL_GPL(zynqmp_pm_sec_read_reg);

618

int zynqmp_pm_sec_read_reg(u32 node_id, u32 offset, u32 *ret_value);