drivers/gpu/drm/xe/tests/xe_rtp_test.c

483

const struct xe_reg_sr_entry *sre, *sr_entry = NULL;

drivers/gpu/drm/xe/xe_gt.c

224

struct xe_reg_sr_entry *entry;

drivers/gpu/drm/xe/xe_guc_ads.c

236

struct xe_reg_sr_entry *sr_entry;

drivers/gpu/drm/xe/xe_guc_ads.c

738

struct xe_reg_sr_entry *entry;

drivers/gpu/drm/xe/xe_reg_sr.c

106

const struct xe_reg_sr_entry *e,

drivers/gpu/drm/xe/xe_reg_sr.c

110

struct xe_reg_sr_entry *pentry = xa_load(&sr->xa, idx);

drivers/gpu/drm/xe/xe_reg_sr.c

166

static void apply_one_mmio(struct xe_gt *gt, struct xe_reg_sr_entry *entry)

drivers/gpu/drm/xe/xe_reg_sr.c

206

struct xe_reg_sr_entry *entry;

drivers/gpu/drm/xe/xe_reg_sr.c

237

struct xe_reg_sr_entry *entry;

drivers/gpu/drm/xe/xe_reg_sr.c

272

struct xe_reg_sr_entry *entry;

drivers/gpu/drm/xe/xe_reg_sr.c

298

struct xe_reg_sr_entry *entry;

drivers/gpu/drm/xe/xe_reg_sr.c

31

struct xe_reg_sr_entry *entry;

drivers/gpu/drm/xe/xe_reg_sr.c

49

static bool compatible_entries(const struct xe_reg_sr_entry *e1,

drivers/gpu/drm/xe/xe_reg_sr.c

50

const struct xe_reg_sr_entry *e2)

drivers/gpu/drm/xe/xe_reg_sr.c

74

const struct xe_reg_sr_entry *e,

drivers/gpu/drm/xe/xe_reg_sr.h

17

struct xe_reg_sr_entry;

drivers/gpu/drm/xe/xe_reg_sr.h

30

int xe_reg_sr_add(struct xe_reg_sr *sr, const struct xe_reg_sr_entry *e,

drivers/gpu/drm/xe/xe_reg_whitelist.c

168

struct xe_reg_sr_entry *entry;

drivers/gpu/drm/xe/xe_reg_whitelist.c

178

struct xe_reg_sr_entry hwe_entry = {

drivers/gpu/drm/xe/xe_reg_whitelist.c

234

struct xe_reg_sr_entry *entry;

drivers/gpu/drm/xe/xe_reg_whitelist.c

296

u32 reg, struct xe_reg_sr_entry *entry)

drivers/gpu/drm/xe/xe_reg_whitelist.c

346

struct xe_reg_sr_entry *entry;

drivers/gpu/drm/xe/xe_reg_whitelist.h

15

struct xe_reg_sr_entry;

drivers/gpu/drm/xe/xe_reg_whitelist.h

23

u32 reg, struct xe_reg_sr_entry *entry);

drivers/gpu/drm/xe/xe_rtp.c

233

struct xe_reg_sr_entry sr_entry = {