drivers/gpu/drm/xe/tests/xe_migrate.c

248

xe_map_wr(xe, &bo->vmap, XE_PAGE_SIZE * (NUM_KERNEL_PDE - 1), u64,

drivers/gpu/drm/xe/tests/xe_migrate.c

270

xe_map_wr(xe, &pt->vmap, 0, u32, 0xdeaddead);

drivers/gpu/drm/xe/xe_guc_ads.c

299

xe_map_wr(ads_to_xe(ads), ads_to_map(ads), *offset, u32,

drivers/gpu/drm/xe/xe_guc_capture.c

1441

xe_map_wr(guc_to_xe(guc), &guc->log.bo->vmap,

drivers/gpu/drm/xe/xe_guc_capture.c

1451

xe_map_wr(guc_to_xe(guc), &guc->log.bo->vmap,

drivers/gpu/drm/xe/xe_guc_submit.c

781

xe_map_wr(xe, &group->cgp_bo->vmap, 0, u32,

drivers/gpu/drm/xe/xe_guc_submit.c

784

xe_map_wr(xe, &group->cgp_bo->vmap,

drivers/gpu/drm/xe/xe_guc_submit.c

788

xe_map_wr(xe, &group->cgp_bo->vmap,

drivers/gpu/drm/xe/xe_guc_submit.c

793

xe_map_wr(xe, &group->cgp_bo->vmap, 17 * sizeof(u32),

drivers/gpu/drm/xe/xe_guc_submit.c

795

xe_map_wr(xe, &group->cgp_bo->vmap, 16 * sizeof(u32), u32, 0);

drivers/gpu/drm/xe/xe_guc_submit.c

797

xe_map_wr(xe, &group->cgp_bo->vmap, 16 * sizeof(u32),

drivers/gpu/drm/xe/xe_guc_submit.c

799

xe_map_wr(xe, &group->cgp_bo->vmap, 17 * sizeof(u32), u32, 0);

drivers/gpu/drm/xe/xe_lmtt.c

329

xe_map_wr(lmtt_to_xe(lmtt), &pt->bo->vmap, idx * sizeof(u32), u32, pte);

drivers/gpu/drm/xe/xe_lmtt.c

334

xe_map_wr(lmtt_to_xe(lmtt), &pt->bo->vmap, idx * sizeof(u64), u64, pte);

drivers/gpu/drm/xe/xe_migrate.c

170

xe_map_wr(xe, &bo->vmap, ofs, u64, entry);

drivers/gpu/drm/xe/xe_migrate.c

179

xe_map_wr(xe, &bo->vmap, ofs, u64, pos | flags);

drivers/gpu/drm/xe/xe_migrate.c

183

xe_map_wr(xe, &bo->vmap, ofs, u64, pos | flags);

drivers/gpu/drm/xe/xe_migrate.c

243

xe_map_wr(xe, &bo->vmap, map_ofs + level * 8, u64, entry);

drivers/gpu/drm/xe/xe_migrate.c

260

xe_map_wr(xe, &bo->vmap, map_ofs + level * 8, u64,

drivers/gpu/drm/xe/xe_migrate.c

277

xe_map_wr(xe, &bo->vmap, map_ofs + level * 8, u64,

drivers/gpu/drm/xe/xe_migrate.c

302

xe_map_wr(xe, &bo->vmap, map_ofs + XE_PAGE_SIZE * level, u64,

drivers/gpu/drm/xe/xe_migrate.c

310

xe_map_wr(xe, &bo->vmap, map_ofs + XE_PAGE_SIZE +

drivers/gpu/drm/xe/xe_migrate.c

322

xe_map_wr(xe, &bo->vmap, map_ofs + XE_PAGE_SIZE * level + 255 * 8, u64,

drivers/gpu/drm/xe/xe_oa.c

233

xe_map_wr(stream->oa->xe, map, report_offset, u64, 0) :

drivers/gpu/drm/xe/xe_oa.c

234

xe_map_wr(stream->oa->xe, map, report_offset, u32, 0);

drivers/gpu/drm/xe/xe_oa.c

251

xe_map_wr(stream->oa->xe, map, report_offset + 8, u64, 0) :

drivers/gpu/drm/xe/xe_oa.c

252

xe_map_wr(stream->oa->xe, map, report_offset + 4, u32, 0);

drivers/gpu/drm/xe/xe_pt.c

1044

xe_map_wr(tile_to_xe(tile), map, (qword_ofs + i) *

drivers/gpu/drm/xe/xe_pt.c

1950

xe_map_wr(tile_to_xe(tile), map, (qword_ofs + i) *

drivers/gpu/drm/xe/xe_pt.h

28

xe_map_wr(xe, map, (idx) * sizeof(u64), u64, data)

drivers/gpu/drm/xe/xe_pxp_submit.c

227

xe_map_wr(xe_, map_, (offset_) * sizeof(u32), u32, val_)

drivers/gpu/drm/xe/xe_pxp_submit.c

400

xe_map_wr(xe, batch, len++ * sizeof(u32), u32, GSC_HECI_CMD_PKT);

drivers/gpu/drm/xe/xe_pxp_submit.c

401

xe_map_wr(xe, batch, len++ * sizeof(u32), u32, lower_32_bits(addr_in));

drivers/gpu/drm/xe/xe_pxp_submit.c

402

xe_map_wr(xe, batch, len++ * sizeof(u32), u32, upper_32_bits(addr_in));

drivers/gpu/drm/xe/xe_pxp_submit.c

403

xe_map_wr(xe, batch, len++ * sizeof(u32), u32, size_in);

drivers/gpu/drm/xe/xe_pxp_submit.c

404

xe_map_wr(xe, batch, len++ * sizeof(u32), u32, lower_32_bits(addr_out));

drivers/gpu/drm/xe/xe_pxp_submit.c

405

xe_map_wr(xe, batch, len++ * sizeof(u32), u32, upper_32_bits(addr_out));

drivers/gpu/drm/xe/xe_pxp_submit.c

406

xe_map_wr(xe, batch, len++ * sizeof(u32), u32, size_out);

drivers/gpu/drm/xe/xe_pxp_submit.c

407

xe_map_wr(xe, batch, len++ * sizeof(u32), u32, 0);

drivers/gpu/drm/xe/xe_pxp_submit.c

408

xe_map_wr(xe, batch, len++ * sizeof(u32), u32, MI_BATCH_BUFFER_END);

drivers/gpu/drm/xe/xe_sriov_vf_ccs.c

402

xe_map_wr(xe, &lrc->bo->vmap, XE_SRIOV_VF_CCS_RW_BB_ADDR_OFFSET, u32, addr);