arch/s390/include/asm/pci_insn.h

157

int zpci_set_irq_ctrl(u16 ctl, u8 isc, union zpci_sic_iib *iib);

arch/s390/kvm/interrupt.c

3351

zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, isc,

arch/s390/kvm/pci.c

25

return zpci_set_irq_ctrl(ctl, isc, &iib);

arch/s390/kvm/pci.c

82

if (zpci_set_irq_ctrl(SIC_SET_AENI_CONTROLS, 0, zpci_aipb)) {

arch/s390/pci/pci_insn.c

153

EXPORT_SYMBOL_GPL(zpci_set_irq_ctrl);

arch/s390/pci/pci_irq.c

187

if (zpci_set_irq_ctrl(SIC_IRQ_MODE_D_SINGLE, PCI_ISC, &iib))

arch/s390/pci/pci_irq.c

228

if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC, &iib))

arch/s390/pci/pci_irq.c

275

if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC, &iib))

arch/s390/pci/pci_irq.c

548

zpci_set_irq_ctrl(SIC_IRQ_MODE_SET_CPU, 0, &iib);

arch/s390/pci/pci_irq.c

549

zpci_set_irq_ctrl(SIC_IRQ_MODE_D_SINGLE, PCI_ISC, &ziib);

arch/s390/pci/pci_irq.c

564

zpci_set_irq_ctrl(SIC_IRQ_MODE_DIRECT, 0, &iib);

arch/s390/pci/pci_irq.c

641

zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC, &iib);