ytphy_modify_ext
ret = ytphy_modify_ext(phydev, YT8521_EXTREG_SLEEP_CONTROL1_REG,
ret = ytphy_modify_ext(phydev, YT8521_CLOCK_GATING_REG,
ret = ytphy_modify_ext(phydev, YT8521_LINK_TIMER_CFG2_REG,
ret = ytphy_modify_ext(phydev, YTPHY_MISC_CONFIG_REG,
return ytphy_modify_ext(phydev, YT8521_CHIP_CONFIG_REG,
err = ytphy_modify_ext(phydev, YT8521_LINK_TIMER_CFG2_REG,
err = ytphy_modify_ext(phydev, YT8521_CHIP_CONFIG_REG,
ret = ytphy_modify_ext(phydev, YT8821_SDS_EXT_CSR_CTRL_REG, mask,
ret = ytphy_modify_ext(phydev, YT8821_UTP_EXT_RPDN_CTRL_REG,
ret = ytphy_modify_ext(phydev,
ret = ytphy_modify_ext(phydev,
ret = ytphy_modify_ext(phydev, YT8821_UTP_EXT_TRACE_CTRL_REG,
ret = ytphy_modify_ext(phydev,
ret = ytphy_modify_ext(phydev, YT8821_UTP_EXT_ECHO_CTRL_REG,
ret = ytphy_modify_ext(phydev, YT8821_UTP_EXT_GAIN_CTRL_REG,
ret = ytphy_modify_ext(phydev,
ret = ytphy_modify_ext(phydev,
ret = ytphy_modify_ext(phydev,
ret = ytphy_modify_ext(phydev, YT8821_UTP_EXT_PI_CTRL_REG,
ret = ytphy_modify_ext(phydev, YT8821_UTP_EXT_VCT_CFG6_CTRL_REG,
ret = ytphy_modify_ext(phydev,
ret = ytphy_modify_ext(phydev, YT8821_UTP_EXT_PLL_CTRL_REG,
ret = ytphy_modify_ext(phydev,
ret = ytphy_modify_ext(phydev,
ret = ytphy_modify_ext(phydev,
ret = ytphy_modify_ext(phydev,
ret = ytphy_modify_ext(phydev,
ret = ytphy_modify_ext(phydev, regnum, mask, set);
ret = ytphy_modify_ext(phydev, YTPHY_WOL_CONFIG_REG, mask, val);
ret = ytphy_modify_ext(phydev, YTPHY_WOL_CONFIG_REG, mask, 0);
return ytphy_modify_ext(phydev, YT8521_REG_SPACE_SELECT_REG, mask, set);
ret = ytphy_modify_ext(phydev, YT8521_CHIP_CONFIG_REG,
return ytphy_modify_ext(phydev, YT8521_RGMII_CONFIG1_REG, mask, val);