yt921x_reg_update_bits
res = yt921x_reg_update_bits(priv, YT921X_MACn_FRAME(port),
return yt921x_reg_update_bits(priv, YT921X_PORTn_VLAN_CTRL(port),
res = yt921x_reg_update_bits(priv, YT921X_PORTn_VLAN_CTRL1(port),
res = yt921x_reg_update_bits(priv, YT921X_STPn(st->msti), mask, ctrl);
res = yt921x_reg_update_bits(priv, YT921X_STPn(0), mask, ctrl);
res = yt921x_reg_update_bits(priv, YT921X_PORTn_LEARN(port),
res = yt921x_reg_update_bits(priv, YT921X_PORTn_QOS(port), mask, ctrl);
return yt921x_reg_update_bits(priv, reg, 0, mask);
return yt921x_reg_update_bits(priv, reg, mask, 0);
return yt921x_reg_update_bits(priv, reg, mask, !set ? 0 : mask);
res = yt921x_reg_update_bits(priv, YT921X_SERDESn(port),
res = yt921x_reg_update_bits(priv, YT921X_SERDESn(port),
res = yt921x_reg_update_bits(priv, YT921X_INT_MBUS_CTRL, mask, ctrl);
res = yt921x_reg_update_bits(priv, YT921X_INT_MBUS_CTRL, mask, ctrl);
res = yt921x_reg_update_bits(priv, YT921X_EXT_MBUS_CTRL, mask, ctrl);
res = yt921x_reg_update_bits(priv, YT921X_EXT_MBUS_CTRL, mask, ctrl);